Nicolas Saenz Julienne 0c51d8f5c8 clk: bcm2835: Do not use prediv with bcm2711's PLLs ...

[ Upstream commit f34e4651ce ]

Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
feedback loop. Bypass it by zeroing fb_prediv_mask when running on
bcm2711.

Note that, since the prediv configuration bits were re-purposed, this
was triggering miscalculations on all clocks hanging from the VPU clock,
notably the aux UART, making its output unintelligible.

Fixes: 42de9ad400 ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20200730182619.23246-1-nsaenzjulienne@suse.de
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2020-08-21 13:05:35 +02:00

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actions

clk: actions: Fix h_clk for Actions S500 SoC

2020-08-21 13:05:33 +02:00

analogbits

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at91

clk: at91: usb: continue if clk_hw_round_rate() return zero

2020-04-23 10:36:28 +02:00

axis

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axs10x

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bcm

clk: bcm2835: Do not use prediv with bcm2711's PLLs

2020-08-21 13:05:35 +02:00

berlin

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davinci

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h8300

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hisilicon

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imgtec

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imx

clk: imx: Align imx sc clock parent msg structs to 4

2020-04-02 15:11:02 +02:00

ingenic

clk: ingenic/TCU: Fix round_rate returning error

2020-04-17 10:50:21 +02:00

keystone

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loongson1

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mediatek

clk: mediatek: assign the initial value to clk_init_data of mtk_mux

2020-06-22 09:31:19 +02:00

meson

clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers

2020-06-24 17:50:23 +02:00

microchip

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mmp

clk: mmp2: Fix the order of timer mux parents

2020-02-05 21:22:43 +00:00

mvebu

clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPER

2020-07-22 09:33:03 +02:00

mxs

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nxp

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pistachio

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pxa

clk: pxa: fix one of the pxa RTC clocks

2020-01-04 19:18:11 +01:00

qcom

clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk

2020-08-21 13:05:34 +02:00

renesas

clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling

2020-06-24 17:50:14 +02:00

rockchip

clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks

2020-05-20 08:20:35 +02:00

samsung

clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1

2020-06-24 17:50:30 +02:00

sifive

clk: sifive: allocate sufficient memory for struct __prci_data

2020-06-30 15:37:01 -04:00

sirf

clk: clk-atlas6: fix return value check in atlas6_clk_init()

2020-08-21 13:05:34 +02:00

socfpga

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spear

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sprd

clk: sprd: return correct type of value for _sprd_pll_recalc_rate

2020-06-24 17:50:35 +02:00

st

clk: clk-flexgen: fix clock-critical handling

2020-06-24 17:50:17 +02:00

sunxi

clk: sunxi: Fix incorrect usage of round_down()

2020-06-24 17:50:08 +02:00

sunxi-ng

clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock

2020-02-24 08:36:42 +01:00

tegra

clk: tegra: Fix Tegra PMC clock out parents

2020-04-23 10:36:29 +02:00

ti

clk: ti: composite: fix memory leak

2020-06-24 17:50:26 +02:00

uniphier

clk: uniphier: Add SCSSI clock gate for each channel

2020-02-24 08:36:42 +01:00

ux500

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versatile

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x86

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zte

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zynq

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zynqmp

clk: zynqmp: fix memory leak in zynqmp_register_clocks

2020-06-24 17:50:16 +02:00

clk-asm9260.c

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clk-aspeed.c

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clk-aspeed.h

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clk-ast2600.c

clk: AST2600: Add mux for EMMC clock

2020-07-22 09:33:03 +02:00

clk-axi-clkgen.c

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clk-axm5516.c

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clk-bd718x7.c

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clk-bulk.c

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clk-cdce706.c

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clk-cdce925.c

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clk-clps711x.c

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clk-composite.c

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clk-conf.c

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clk-cs2000-cp.c

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clk-devres.c

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clk-divider.c

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clk-efm32gg.c

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clk-fixed-factor.c

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clk-fixed-mmio.c

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clk-fixed-rate.c

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clk-fractional-divider.c

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clk-gate.c

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clk-gemini.c

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clk-gpio.c

clk: clk-gpio: propagate rate change to parent

2020-01-04 19:17:21 +01:00

clk-hi655x.c

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clk-highbank.c

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clk-hsdk-pll.c

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clk-lochnagar.c

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clk-max9485.c

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clk-max77686.c

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clk-milbeaut.c

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clk-moxart.c

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clk-multiplier.c

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clk-mux.c

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clk-nomadik.c

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clk-npcm7xx.c

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clk-nspire.c

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clk-oxnas.c

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clk-palmas.c

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clk-pwm.c

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clk-qoriq.c

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clk-rk808.c

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clk-s2mps11.c

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clk-scmi.c

clk: scmi: Fix min and max rate when registering clocks with discrete rates

2020-08-19 08:15:55 +02:00

clk-scpi.c

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clk-si514.c

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clk-si544.c

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clk-si570.c

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clk-si5341.c

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clk-si5351.c

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clk-si5351.h

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clk-stm32f4.c

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clk-stm32h7.c

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clk-stm32mp1.c

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clk-tango4.c

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clk-twl6040.c

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clk-u300.c

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clk-versaclock5.c

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clk-vt8500.c

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clk-wm831x.c

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clk-xgene.c

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clk.c

PM: runtime: clk: Fix clk_pm_runtime_get() error path

2020-06-17 16:40:30 +02:00

clk.h

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clkdev.c

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Kconfig

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Makefile

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