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Lubomir Rintel aab165d61c clk: mmp2: Fix the order of timer mux parents
[ Upstream commit 8bea5ac0fb ]

Determined empirically, no documentation is available.

The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but
thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing
what is going on, ended up just dividing the rate as of
commit f36797ee43 ("ARM: mmp/mmp2: dt: enable the clock")'

Link: https://lore.kernel.org/r/20191218190454.420358-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-05 21:22:43 +00:00
..
2020-01-12 12:21:34 +01:00
2019-05-07 11:46:02 -07:00
2019-05-07 11:46:02 -07:00
2019-09-06 15:22:29 -07:00