Fahad Kunnathadi fc2fe7a06d net: phy: Fix mask value write on gmii2rgmii converter speed register ...

[ Upstream commit f2654a4781 ]

To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)

This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter

Fixes: f411a6160b ("net: phy: Add gmiitorgmii converter support")

Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2017-10-12 11:51:21 +02:00

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amd.c

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aquantia.c

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at803x.c

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bcm7xxx.c

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bcm63xx.c

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bcm87xx.c

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bcm-cygnus.c

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bcm-phy-lib.c

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bcm-phy-lib.h

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broadcom.c

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cicada.c

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davicom.c

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dp83640_reg.h

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dp83640.c

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dp83848.c

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dp83867.c

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et1011c.c

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fixed_phy.c

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icplus.c

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intel-xway.c

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Kconfig

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lxt.c

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Makefile

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marvell.c

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mdio_bus.c

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mdio_device.c

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mdio-bcm-iproc.c

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mdio-bcm-unimac.c

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mdio-bitbang.c

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mdio-cavium.c

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mdio-cavium.h

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mdio-gpio.c

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mdio-hisi-femac.c

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mdio-moxart.c

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mdio-mux-bcm-iproc.c

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mdio-mux-gpio.c

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mdio-mux-mmioreg.c

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mdio-mux.c

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mdio-octeon.c

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mdio-sun4i.c

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mdio-thunder.c

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mdio-xgene.c

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mdio-xgene.h

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micrel.c

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microchip.c

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mscc.c

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national.c

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phy_device.c

net: phy: Fix PHY unbind crash

2017-08-11 08:49:37 -07:00

phy.c

Revert "net: phy: Correctly process PHY_HALTED in phy_stop_machine()"

2017-09-20 08:19:55 +02:00

qsemi.c

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realtek.c

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smsc.c

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spi_ks8995.c

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ste10Xp.c

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swphy.c

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swphy.h

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teranetics.c

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vitesse.c

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xilinx_gmii2rgmii.c

net: phy: Fix mask value write on gmii2rgmii converter speed register

2017-10-12 11:51:21 +02:00