a7bea83089
Some Intel CPUs don't recognize 64-bit XORs as zeroing idioms. Zeroing idioms don't require execution bandwidth, as they're being taken care of in the frontend (through register renaming). Use 32-bit XORs instead. Signed-off-by: Jan Beulich <jbeulich@suse.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: davem@davemloft.net Cc: herbert@gondor.apana.org.au Cc: pavel@ucw.cz Cc: rjw@rjwysocki.net Link: http://lkml.kernel.org/r/5B39FF1A02000078001CFB54@prv1-mh.provo.novell.com Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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| .. | ||
| .gitignore | ||
| atomic64_32.c | ||
| atomic64_386_32.S | ||
| atomic64_cx8_32.S | ||
| cache-smp.c | ||
| checksum_32.S | ||
| clear_page_64.S | ||
| cmdline.c | ||
| cmpxchg8b_emu.S | ||
| cmpxchg16b_emu.S | ||
| copy_page_64.S | ||
| copy_user_64.S | ||
| cpu.c | ||
| csum-copy_64.S | ||
| csum-partial_64.c | ||
| csum-wrappers_64.c | ||
| delay.c | ||
| error-inject.c | ||
| getuser.S | ||
| hweight.S | ||
| inat.c | ||
| insn-eval.c | ||
| insn.c | ||
| iomap_copy_64.S | ||
| kaslr.c | ||
| Makefile | ||
| memcpy_32.c | ||
| memcpy_64.S | ||
| memmove_64.S | ||
| memset_64.S | ||
| misc.c | ||
| mmx_32.c | ||
| msr-reg-export.c | ||
| msr-reg.S | ||
| msr-smp.c | ||
| msr.c | ||
| putuser.S | ||
| retpoline.S | ||
| rwsem.S | ||
| string_32.c | ||
| strstr_32.c | ||
| usercopy_32.c | ||
| usercopy_64.c | ||
| usercopy.c | ||
| x86-opcode-map.txt | ||