ca53e7640d
The new API is cleaner and reduces code size significantly. All chip accesses are 'hidden' in chip access to prepare for using regmap. Local caching code is removed, to be replaced by regmap based caching in a follow-up patch. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
673 lines
17 KiB
C
673 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* tmp401.c
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*
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* Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
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* Preliminary tmp411 support by:
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* Gabriel Konat, Sander Leget, Wouter Willems
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* Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
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*
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* Cleanup and support for TMP431 and TMP432 by Guenter Roeck
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* Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
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*/
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/*
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* Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
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*
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* Note this IC is in some aspect similar to the LM90, but it has quite a
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* few differences too, for example the local temp has a higher resolution
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* and thus has 16 bits registers for its value and limit instead of 8 bits.
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*/
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/hwmon.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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/* Addresses to scan */
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static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
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0x4e, 0x4f, I2C_CLIENT_END };
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enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
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/*
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* The TMP401 registers, note some registers have different addresses for
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* reading and writing
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*/
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#define TMP401_STATUS 0x02
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#define TMP401_CONFIG_READ 0x03
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#define TMP401_CONFIG_WRITE 0x09
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#define TMP401_CONVERSION_RATE_READ 0x04
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#define TMP401_CONVERSION_RATE_WRITE 0x0A
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#define TMP401_TEMP_CRIT_HYST 0x21
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#define TMP401_MANUFACTURER_ID_REG 0xFE
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#define TMP401_DEVICE_ID_REG 0xFF
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static const u8 TMP401_TEMP_MSB_READ[7][3] = {
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{ 0x00, 0x01, 0x23 }, /* temp */
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{ 0x06, 0x08, 0x16 }, /* low limit */
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{ 0x05, 0x07, 0x15 }, /* high limit */
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{ 0x20, 0x19, 0x1a }, /* therm (crit) limit */
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{ 0x30, 0x34, 0x00 }, /* lowest */
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{ 0x32, 0xf6, 0x00 }, /* highest */
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};
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static const u8 TMP401_TEMP_MSB_WRITE[7][3] = {
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{ 0x00, 0x00, 0x00 }, /* temp (unused) */
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{ 0x0C, 0x0E, 0x16 }, /* low limit */
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{ 0x0B, 0x0D, 0x15 }, /* high limit */
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{ 0x20, 0x19, 0x1a }, /* therm (crit) limit */
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{ 0x30, 0x34, 0x00 }, /* lowest */
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{ 0x32, 0xf6, 0x00 }, /* highest */
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};
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/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
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static const u8 TMP432_STATUS_REG[] = {
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0x1b, 0x36, 0x35, 0x37 };
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/* Flags */
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#define TMP401_CONFIG_RANGE BIT(2)
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#define TMP401_CONFIG_SHUTDOWN BIT(6)
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#define TMP401_STATUS_LOCAL_CRIT BIT(0)
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#define TMP401_STATUS_REMOTE_CRIT BIT(1)
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#define TMP401_STATUS_REMOTE_OPEN BIT(2)
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#define TMP401_STATUS_REMOTE_LOW BIT(3)
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#define TMP401_STATUS_REMOTE_HIGH BIT(4)
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#define TMP401_STATUS_LOCAL_LOW BIT(5)
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#define TMP401_STATUS_LOCAL_HIGH BIT(6)
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/* On TMP432, each status has its own register */
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#define TMP432_STATUS_LOCAL BIT(0)
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#define TMP432_STATUS_REMOTE1 BIT(1)
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#define TMP432_STATUS_REMOTE2 BIT(2)
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/* Manufacturer / Device ID's */
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#define TMP401_MANUFACTURER_ID 0x55
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#define TMP401_DEVICE_ID 0x11
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#define TMP411A_DEVICE_ID 0x12
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#define TMP411B_DEVICE_ID 0x13
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#define TMP411C_DEVICE_ID 0x10
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#define TMP431_DEVICE_ID 0x31
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#define TMP432_DEVICE_ID 0x32
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#define TMP435_DEVICE_ID 0x35
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/*
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* Driver data (common to all clients)
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*/
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static const struct i2c_device_id tmp401_id[] = {
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{ "tmp401", tmp401 },
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{ "tmp411", tmp411 },
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{ "tmp431", tmp431 },
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{ "tmp432", tmp432 },
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{ "tmp435", tmp435 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, tmp401_id);
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/*
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* Client data (each client gets its own)
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*/
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struct tmp401_data {
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struct i2c_client *client;
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struct mutex update_lock;
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enum chips kind;
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bool extended_range;
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/* hwmon API configuration data */
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u32 chip_channel_config[4];
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struct hwmon_channel_info chip_info;
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u32 temp_channel_config[4];
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struct hwmon_channel_info temp_info;
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const struct hwmon_channel_info *info[3];
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struct hwmon_chip_info chip;
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};
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static int tmp401_register_to_temp(u16 reg, bool extended)
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{
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int temp = reg;
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if (extended)
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temp -= 64 * 256;
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return DIV_ROUND_CLOSEST(temp * 125, 32);
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}
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static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)
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{
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if (extended) {
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temp = clamp_val(temp, -64000, 191000);
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temp += 64000;
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} else {
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temp = clamp_val(temp, 0, 127000);
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}
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return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
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}
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static int tmp401_reg_read(struct tmp401_data *data, unsigned int reg)
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{
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struct i2c_client *client = data->client;
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int val, regval;
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switch (reg) {
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case 0: /* local temp msb */
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case 1: /* remote temp msb */
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case 5: /* local temp high limit msb */
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case 6: /* local temp low limit msb */
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case 7: /* remote temp ligh limit msb */
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case 8: /* remote temp low limit msb */
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case 0x15: /* remote temp 2 high limit msb */
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case 0x16: /* remote temp 2 low limit msb */
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case 0x23: /* remote temp 2 msb */
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case 0x30: /* local temp minimum, tmp411 */
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case 0x32: /* local temp maximum, tmp411 */
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case 0x34: /* remote temp minimum, tmp411 */
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case 0xf6: /* remote temp maximum, tmp411 (really 0x36) */
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/* work around register overlap between TMP411 and TMP432 */
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if (reg == 0xf6)
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reg = 0x36;
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return i2c_smbus_read_word_swapped(client, reg);
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case 0x19: /* critical limits, 8-bit registers */
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case 0x1a:
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case 0x20:
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regval = i2c_smbus_read_byte_data(client, reg);
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if (regval < 0)
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return regval;
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return regval << 8;
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case 0x1b:
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case 0x35 ... 0x37:
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if (data->kind == tmp432)
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return i2c_smbus_read_byte_data(client, reg);
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/* simulate TMP432 status registers */
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regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);
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if (regval < 0)
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return regval;
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val = 0;
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switch (reg) {
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case 0x1b: /* open / fault */
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if (regval & TMP401_STATUS_REMOTE_OPEN)
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val |= BIT(1);
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break;
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case 0x35: /* high limit */
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if (regval & TMP401_STATUS_LOCAL_HIGH)
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val |= BIT(0);
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if (regval & TMP401_STATUS_REMOTE_HIGH)
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val |= BIT(1);
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break;
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case 0x36: /* low limit */
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if (regval & TMP401_STATUS_LOCAL_LOW)
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val |= BIT(0);
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if (regval & TMP401_STATUS_REMOTE_LOW)
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val |= BIT(1);
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break;
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case 0x37: /* therm / crit limit */
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if (regval & TMP401_STATUS_LOCAL_CRIT)
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val |= BIT(0);
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if (regval & TMP401_STATUS_REMOTE_CRIT)
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val |= BIT(1);
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break;
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}
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return val;
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default:
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return i2c_smbus_read_byte_data(client, reg);
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}
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}
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static int tmp401_reg_write(struct tmp401_data *data, unsigned int reg, unsigned int val)
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{
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struct i2c_client *client = data->client;
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switch (reg) {
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case 0x0b: /* local temp high limit msb */
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case 0x0c: /* local temp low limit msb */
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case 0x0d: /* remote temp ligh limit msb */
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case 0x0e: /* remote temp low limit msb */
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case 0x15: /* remote temp 2 high limit msb */
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case 0x16: /* remote temp 2 low limit msb */
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return i2c_smbus_write_word_swapped(client, reg, val);
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case 0x19: /* critical limits, 8-bit registers */
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case 0x1a:
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case 0x20:
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return i2c_smbus_write_byte_data(client, reg, val >> 8);
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default:
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return i2c_smbus_write_byte_data(client, reg, val);
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}
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}
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static const u8 tmp401_temp_reg_index[] = {
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[hwmon_temp_input] = 0,
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[hwmon_temp_min] = 1,
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[hwmon_temp_max] = 2,
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[hwmon_temp_crit] = 3,
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[hwmon_temp_lowest] = 4,
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[hwmon_temp_highest] = 5,
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};
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static const u8 tmp401_status_reg_index[] = {
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[hwmon_temp_fault] = 0,
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[hwmon_temp_min_alarm] = 1,
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[hwmon_temp_max_alarm] = 2,
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[hwmon_temp_crit_alarm] = 3,
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};
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static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)
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{
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struct tmp401_data *data = dev_get_drvdata(dev);
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int reg, regval;
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_min:
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case hwmon_temp_max:
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case hwmon_temp_crit:
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case hwmon_temp_lowest:
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case hwmon_temp_highest:
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reg = TMP401_TEMP_MSB_READ[tmp401_temp_reg_index[attr]][channel];
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regval = tmp401_reg_read(data, reg);
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if (regval < 0)
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return regval;
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*val = tmp401_register_to_temp(regval, data->extended_range);
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break;
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case hwmon_temp_crit_hyst:
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mutex_lock(&data->update_lock);
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reg = TMP401_TEMP_MSB_READ[3][channel];
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regval = tmp401_reg_read(data, reg);
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if (regval < 0)
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goto unlock;
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*val = tmp401_register_to_temp(regval, data->extended_range);
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regval = tmp401_reg_read(data, TMP401_TEMP_CRIT_HYST);
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if (regval < 0)
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goto unlock;
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*val -= regval * 1000;
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regval = 0;
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unlock:
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mutex_unlock(&data->update_lock);
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if (regval < 0)
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return regval;
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break;
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case hwmon_temp_fault:
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case hwmon_temp_min_alarm:
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case hwmon_temp_max_alarm:
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case hwmon_temp_crit_alarm:
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reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];
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regval = tmp401_reg_read(data, reg);
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if (regval < 0)
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return regval;
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*val = !!(regval & BIT(channel));
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int tmp401_temp_write(struct device *dev, u32 attr, int channel,
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long val)
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{
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struct tmp401_data *data = dev_get_drvdata(dev);
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int reg, regval, ret, temp;
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mutex_lock(&data->update_lock);
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switch (attr) {
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case hwmon_temp_min:
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case hwmon_temp_max:
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case hwmon_temp_crit:
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reg = TMP401_TEMP_MSB_WRITE[tmp401_temp_reg_index[attr]][channel];
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regval = tmp401_temp_to_register(val, data->extended_range,
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attr == hwmon_temp_crit ? 8 : 4);
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ret = tmp401_reg_write(data, reg, regval);
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break;
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case hwmon_temp_crit_hyst:
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if (data->extended_range)
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val = clamp_val(val, -64000, 191000);
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else
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val = clamp_val(val, 0, 127000);
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reg = TMP401_TEMP_MSB_READ[3][channel];
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ret = tmp401_reg_read(data, reg);
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if (ret < 0)
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break;
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temp = tmp401_register_to_temp(ret, data->extended_range);
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val = clamp_val(val, temp - 255000, temp);
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regval = ((temp - val) + 500) / 1000;
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ret = tmp401_reg_write(data, TMP401_TEMP_CRIT_HYST, regval);
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break;
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default:
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ret = -EOPNOTSUPP;
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break;
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}
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mutex_unlock(&data->update_lock);
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return ret;
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}
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static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)
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{
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struct tmp401_data *data = dev_get_drvdata(dev);
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int regval;
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switch (attr) {
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case hwmon_chip_update_interval:
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regval = tmp401_reg_read(data, TMP401_CONVERSION_RATE_READ);
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if (regval < 0)
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return regval;
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*val = (1 << (7 - regval)) * 125;
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break;
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case hwmon_chip_temp_reset_history:
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*val = 0;
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int tmp401_set_convrate(struct i2c_client *client, struct tmp401_data *data, long val)
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{
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int err, rate;
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/*
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* For valid rates, interval can be calculated as
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* interval = (1 << (7 - rate)) * 125;
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* Rounded rate is therefore
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* rate = 7 - __fls(interval * 4 / (125 * 3));
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* Use clamp_val() to avoid overflows, and to ensure valid input
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* for __fls.
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*/
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val = clamp_val(val, 125, 16000);
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rate = 7 - __fls(val * 4 / (125 * 3));
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err = i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
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if (err)
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return err;
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return 0;
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}
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static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)
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{
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struct tmp401_data *data = dev_get_drvdata(dev);
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struct i2c_client *client = data->client;
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int err;
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mutex_lock(&data->update_lock);
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switch (attr) {
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case hwmon_chip_update_interval:
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err = tmp401_set_convrate(client, data, val);
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break;
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case hwmon_chip_temp_reset_history:
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if (val != 1) {
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err = -EINVAL;
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break;
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}
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/*
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* Reset history by writing any value to any of the
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* minimum/maximum registers (0x30-0x37).
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*/
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err = i2c_smbus_write_byte_data(client, 0x30, 0);
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break;
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default:
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err = -EOPNOTSUPP;
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break;
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}
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mutex_unlock(&data->update_lock);
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return err;
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}
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static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_chip:
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return tmp401_chip_read(dev, attr, channel, val);
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case hwmon_temp:
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return tmp401_temp_read(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_chip:
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return tmp401_chip_write(dev, attr, channel, val);
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case hwmon_temp:
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return tmp401_temp_write(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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switch (type) {
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case hwmon_chip:
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switch (attr) {
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case hwmon_chip_update_interval:
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case hwmon_chip_temp_reset_history:
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return 0644;
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default:
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break;
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}
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break;
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_min_alarm:
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case hwmon_temp_max_alarm:
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case hwmon_temp_crit_alarm:
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case hwmon_temp_fault:
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case hwmon_temp_lowest:
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case hwmon_temp_highest:
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return 0444;
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case hwmon_temp_min:
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case hwmon_temp_max:
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case hwmon_temp_crit:
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case hwmon_temp_crit_hyst:
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return 0644;
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default:
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break;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct hwmon_ops tmp401_ops = {
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.is_visible = tmp401_is_visible,
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.read = tmp401_read,
|
|
.write = tmp401_write,
|
|
};
|
|
|
|
static int tmp401_init_client(struct tmp401_data *data,
|
|
struct i2c_client *client)
|
|
{
|
|
int config, config_orig, status = 0;
|
|
|
|
/* Set the conversion rate to 2 Hz */
|
|
i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
|
|
|
|
/* Start conversions (disable shutdown if necessary) */
|
|
config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
|
|
if (config < 0)
|
|
return config;
|
|
|
|
config_orig = config;
|
|
config &= ~TMP401_CONFIG_SHUTDOWN;
|
|
|
|
data->extended_range = !!(config & TMP401_CONFIG_RANGE);
|
|
|
|
if (config != config_orig)
|
|
status = i2c_smbus_write_byte_data(client,
|
|
TMP401_CONFIG_WRITE,
|
|
config);
|
|
|
|
return status;
|
|
}
|
|
|
|
static int tmp401_detect(struct i2c_client *client,
|
|
struct i2c_board_info *info)
|
|
{
|
|
enum chips kind;
|
|
struct i2c_adapter *adapter = client->adapter;
|
|
u8 reg;
|
|
|
|
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
|
|
return -ENODEV;
|
|
|
|
/* Detect and identify the chip */
|
|
reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
|
|
if (reg != TMP401_MANUFACTURER_ID)
|
|
return -ENODEV;
|
|
|
|
reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
|
|
|
|
switch (reg) {
|
|
case TMP401_DEVICE_ID:
|
|
if (client->addr != 0x4c)
|
|
return -ENODEV;
|
|
kind = tmp401;
|
|
break;
|
|
case TMP411A_DEVICE_ID:
|
|
if (client->addr != 0x4c)
|
|
return -ENODEV;
|
|
kind = tmp411;
|
|
break;
|
|
case TMP411B_DEVICE_ID:
|
|
if (client->addr != 0x4d)
|
|
return -ENODEV;
|
|
kind = tmp411;
|
|
break;
|
|
case TMP411C_DEVICE_ID:
|
|
if (client->addr != 0x4e)
|
|
return -ENODEV;
|
|
kind = tmp411;
|
|
break;
|
|
case TMP431_DEVICE_ID:
|
|
if (client->addr != 0x4c && client->addr != 0x4d)
|
|
return -ENODEV;
|
|
kind = tmp431;
|
|
break;
|
|
case TMP432_DEVICE_ID:
|
|
if (client->addr != 0x4c && client->addr != 0x4d)
|
|
return -ENODEV;
|
|
kind = tmp432;
|
|
break;
|
|
case TMP435_DEVICE_ID:
|
|
kind = tmp435;
|
|
break;
|
|
default:
|
|
return -ENODEV;
|
|
}
|
|
|
|
reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
|
|
if (reg & 0x1b)
|
|
return -ENODEV;
|
|
|
|
reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
|
|
/* Datasheet says: 0x1-0x6 */
|
|
if (reg > 15)
|
|
return -ENODEV;
|
|
|
|
strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tmp401_probe(struct i2c_client *client)
|
|
{
|
|
static const char * const names[] = {
|
|
"TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
|
|
};
|
|
struct device *dev = &client->dev;
|
|
struct hwmon_channel_info *info;
|
|
struct device *hwmon_dev;
|
|
struct tmp401_data *data;
|
|
int status;
|
|
|
|
data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
data->client = client;
|
|
mutex_init(&data->update_lock);
|
|
data->kind = i2c_match_id(tmp401_id, client)->driver_data;
|
|
|
|
/* initialize configuration data */
|
|
data->chip.ops = &tmp401_ops;
|
|
data->chip.info = data->info;
|
|
|
|
data->info[0] = &data->chip_info;
|
|
data->info[1] = &data->temp_info;
|
|
|
|
info = &data->chip_info;
|
|
info->type = hwmon_chip;
|
|
info->config = data->chip_channel_config;
|
|
|
|
data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;
|
|
|
|
info = &data->temp_info;
|
|
info->type = hwmon_temp;
|
|
info->config = data->temp_channel_config;
|
|
|
|
data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
|
|
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
|
|
data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
|
|
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
|
|
|
|
if (data->kind == tmp411) {
|
|
data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
|
|
data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
|
|
data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;
|
|
}
|
|
|
|
if (data->kind == tmp432) {
|
|
data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
|
|
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
|
|
}
|
|
|
|
/* Initialize the TMP401 chip */
|
|
status = tmp401_init_client(data, client);
|
|
if (status < 0)
|
|
return status;
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
|
|
&data->chip, NULL);
|
|
if (IS_ERR(hwmon_dev))
|
|
return PTR_ERR(hwmon_dev);
|
|
|
|
dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct i2c_driver tmp401_driver = {
|
|
.class = I2C_CLASS_HWMON,
|
|
.driver = {
|
|
.name = "tmp401",
|
|
},
|
|
.probe_new = tmp401_probe,
|
|
.id_table = tmp401_id,
|
|
.detect = tmp401_detect,
|
|
.address_list = normal_i2c,
|
|
};
|
|
|
|
module_i2c_driver(tmp401_driver);
|
|
|
|
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
|
|
MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
|
|
MODULE_LICENSE("GPL");
|