97dcb82de6
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| .. | ||
| ecc.h | ||
| interrupts.h | ||
| ioasic_addrs.h | ||
| ioasic_ints.h | ||
| ioasic.h | ||
| kn01.h | ||
| kn02.h | ||
| kn02ba.h | ||
| kn02ca.h | ||
| kn02xa.h | ||
| kn03.h | ||
| kn05.h | ||
| kn230.h | ||
| machtype.h | ||
| prom.h | ||
| serial.h | ||
| system.h | ||
| tc.h | ||
| tcinfo.h | ||
| tcmodule.h | ||