Catalin Marinas 72c5839515 arm64: gicv3: Allow GICv3 compilation with older binutils ... GICv3 introduces new system registers accessible with the full msr/mrs syntax (e.g. mrs x0, Sop0_op1_CRm_CRn_op2). However, only recent binutils understand the new syntax. This patch introduces msr_s/mrs_s assembly macros which generate the equivalent instructions above and converts the existing GICv3 code (both drivers/irqchip/ and arch/arm64/kernel/). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Olof Johansson <olof@lixom.net> Tested-by: Olof Johansson <olof@lixom.net> Suggested-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Will Deacon <will.deacon@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com>		2014-07-25 13:12:15 +01:00
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arm-gic-v3.h	arm64: gicv3: Allow GICv3 compilation with older binutils	2014-07-25 13:12:15 +01:00
arm-gic.h	irqchip: gic: Use mask field in GICC_IAR	2014-05-19 00:35:23 +00:00
arm-vic.h	irqchip: support cascaded VICs	2014-02-13 11:21:21 +01:00
chained_irq.h	arm: Move chained_irq_(enter|exit) to a generic file	2013-03-26 16:11:43 +00:00
irq-crossbar.h	DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP	2014-02-05 20:08:34 +05:30
metag-ext.h
metag.h
mmp.h	ARM: mmp: avoid to include head file in mach-mmp	2013-08-24 17:44:45 +08:00
mxs.h	ARM: mxs: move icoll driver into drivers/irqchip	2013-04-01 16:30:04 +08:00
spear-shirq.h
versatile-fpga.h
xtensa-mx.h	xtensa: add MX irqchip	2014-01-14 10:19:58 -08:00
xtensa-pic.h	xtensa: move built-in PIC to drivers/irqchip	2014-01-14 10:19:56 -08:00