7ca267faba
Some newer Intel SoCs, like Braswell already have more than 256 GPIOs available so the default limit is exceeded. Instead of adding more architecture specific gpio.h files with custom ARCH_NR_GPIOs we increase the gpiolib default limit to be twice the current. Current generic ARCH_NR_GPIOS limit is 256 which starts to be too small for newer Intel SoCs like Braswell. In order to support GPIO controllers on these SoCs we increase ARCH_NR_GPIOS to be 512 which should be sufficient for now. The kernel size increases a bit with this change. Below is an example of x86_64 kernel image. ARCH_NR_GPIOS=256 text data bss dec hex filename 11476173 1971328 1265664 14713165 e0814d vmlinux ARCH_NR_GPIOS=512 text data bss dec hex filename 11476173 1971328 1269760 14717261 e0914d vmlinux So the BSS size and this the kernel image size increases by 4k. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| .. | ||
| acpi | ||
| asm-generic | ||
| clocksource | ||
| crypto | ||
| drm | ||
| dt-bindings | ||
| keys | ||
| kvm | ||
| linux | ||
| math-emu | ||
| media | ||
| memory | ||
| misc | ||
| net | ||
| pcmcia | ||
| ras | ||
| rdma | ||
| rxrpc | ||
| scsi | ||
| soc/tegra | ||
| sound | ||
| target | ||
| trace | ||
| uapi | ||
| video | ||
| xen | ||
| Kbuild | ||