Sean Paul
3d786b91cd
drm/msm: dpu: Only check flush register against pending flushes
...
[ Upstream commit 5f79e03b1f ]
There exists a case where a flush of a plane/dma may have been triggered
& started from an async commit. If that plane/dma is subsequently disabled
by the next commit, the flush register will continue to hold the flush
bit for the disabled plane. Since the bit remains active,
pending_kickoff_cnt will never decrement and we'll miss frame_done
events.
This patch limits the check of flush_register to include only those bits
which have been updated with the latest commit.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Signed-off-by: Rob Clark <robdclark@gmail.com >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2019-02-12 19:47:08 +01:00
..
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