Implement an I2C controller sharing mechanism between the host (kernel)
and PSP co-processor on some platforms equipped with AMD Cezanne SoC.
On these platforms we need to implement "software" i2c arbitration.
Default arbitration owner is PSP and kernel asks for acquire as well
as inform about release of the i2c bus via mailbox mechanism.
+---------+
<- ACQUIRE | |
+---------| CPU |\
| | | \ +----------+ SDA
| +---------+ \ | |-------
MAILBOX +--> | I2C-DW | SCL
| +---------+ | |-------
| | | +----------+
+---------| PSP |
<- ACK | |
+---------+
+---------+
<- RELEASE | |
+---------| CPU |
| | | +----------+ SDA
| +---------+ | |-------
MAILBOX +--> | I2C-DW | SCL
| +---------+ / | |-------
| | | / +----------+
+---------| PSP |/
<- ACK | |
+---------+
The solution is similar to i2c-designware-baytrail.c implementation, where
we are using a generic i2c-designware-* driver with a small "wrapper".
In contrary to baytrail semaphore implementation, beside internal
acquire_lock() and release_lock() methods we are also applying quirks to
lock_bus() and unlock_bus() global adapter methods. With this in place
all i2c clients drivers may lock i2c bus for a desired number of i2c
transactions (e.g. write-wait-read) without being aware of that such bus
is shared with another entity.
Modify i2c_dw_probe_lock_support() to select correct semaphore
implementation at runtime, since now we have more than one available.
Configure new matching ACPI ID "AMDI0019" and register
ARBITRATION_SEMAPHORE flag in order to distinguish setup with PSP
arbitration.
Add myself as a reviewer for I2C DesignWare in order to help with reviewing
and testing possible changes touching new i2c-designware-amdpsp.c module.
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
[wsa: removed unneeded blank line and curly braces]
Signed-off-by: Wolfram Sang <wsa@kernel.org>
78d5e9e299