Alex Deucher
fc332a4d37
commitd5aa417808upstream. This code was written prior to previous updates to this logic for other chips. The RSC registers are part of SMUIO which is an always on block so there is no need to disable gfxoff. Additionally add the carryover and preemption checks. v2: rebase Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.y:5591a051b8: drm/amdgpu: refine get gpu clock counter method Cc: stable@vger.kernel.org # 6.2.y:5591a051b8: drm/amdgpu: refine get gpu clock counter method Cc: stable@vger.kernel.org # 6.3.y:5591a051b8: drm/amdgpu: refine get gpu clock counter method Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>