twx-linux/include/linux/dma
Serge Semin 53c0e2f9b8 dmaengine: dw-edma: Replace chip ID number with device name
Using an abstract number as the DW eDMA chip identifier isn't practical
because there can be more than one DW eDMA controller on the platform. Some
may be detected as the PCIe Endpoints, and others may be embedded in DW
PCIe Root Port/Endpoint controllers.  An abstract number in, for instance,
the IRQ handlers list, doesn't give a notion regarding their reference to
the particular DMA controller.

To preserve the code simplicity and support multi-eDMA platforms, use the
parental device name to create the DW eDMA controller name.

Link: https://lore.kernel.org/r/20230113171409.30470-22-Sergey.Semin@baikalelectronics.ru
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
2023-02-10 17:15:23 -06:00
..
dw.h
edma.h dmaengine: dw-edma: Replace chip ID number with device name 2023-02-10 17:15:23 -06:00
hsu.h dmaengine: hsu: Include headers we are direct user of 2022-09-04 22:49:35 +05:30
idma64.h
imx-dma.h dmaengine: imx-sdma: Add FIFO stride support for multi FIFO script 2022-07-21 18:28:35 +05:30
ipu-dma.h
k3-event-router.h dmaengine: ti: Add support for k3 event routers 2020-12-11 21:20:09 +05:30
k3-psil.h dmaengine: ti: k3-psil: optimize struct psil_endpoint_config for size 2021-02-01 11:29:11 +05:30
k3-udma-glue.h dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA 2020-12-11 21:20:10 +05:30
mxs-dma.h
pxa-dma.h
qcom_adm.h dmaengine: qcom-adm: stop abusing slave_id config 2021-12-17 11:23:56 +05:30
qcom_bam_dma.h
qcom-gpi-dma.h dmaengine: qcom: fix typo in comment 2022-07-06 10:50:43 +05:30
sprd-dma.h
ti-cppi5.h
xilinx_dma.h
xilinx_dpdma.h dmaengine: xilinx_dpdma: use correct SDPX tag for header file 2022-01-03 17:05:02 +05:30