dfad549d98
The inline assembly differences for v6 vs. v7 are purely optimizations. On a v7 processor, an mrc with the pc sets the condition codes to the 28-31 bits of the register being read. It just so happens that the TX/RX full bits the DCC support code is testing for are high enough in the register to be put into the condition codes. On a v6 processor, this "feature" isn't implemented and thus we have to do the usual read, mask, test operations to check for TX/RX full. Thus, we can drop the v7 implementation and just use the v6 implementation for both. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
||
|---|---|---|
| .. | ||
| .gitignore | ||
| big-endian.S | ||
| decompress.c | ||
| head-sa1100.S | ||
| head-shark.S | ||
| head-sharpsl.S | ||
| head-shmobile.S | ||
| head-vt8500.S | ||
| head-xscale.S | ||
| head.S | ||
| ll_char_wr.S | ||
| Makefile | ||
| misc.c | ||
| mmcif-sh7372.c | ||
| ofw-shark.c | ||
| piggy.gzip.S | ||
| piggy.lzma.S | ||
| piggy.lzo.S | ||
| vmlinux.lds.in | ||