Frank Wang f07500720b phy: rockchip: usbdp: init flip variable in fixed lane mux case ...

It should be initialized the USB flip for fixed lane mapping case
if the USB lanes are assigned. The ln0/ln1 is normal (!flip) and ln2/ln3
is reverse (flip).

This also amend "rx cdr lock timeout" log level to notice since it
may not cause the functional defect in most cases.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I693f772b87df97581a60f89219ec4dc6cafb79a3

2022-11-30 16:22:03 +08:00

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allwinner

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amlogic

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broadcom

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cadence

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freescale

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hisilicon

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intel

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lantiq

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marvell

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mediatek

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motorola

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mscc

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qualcomm

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ralink

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renesas

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rockchip

phy: rockchip: usbdp: init flip variable in fixed lane mux case

2022-11-30 16:22:03 +08:00

samsung

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socionext

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st

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tegra

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ti

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xilinx

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Kconfig

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Makefile

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phy-core-mipi-dphy.c

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phy-core.c

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phy-lgm-usb.c

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phy-lpc18xx-usb-otg.c

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phy-pistachio-usb.c

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phy-xgene.c

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