Martin Blumenstingl cd89e3cbbd clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL ...

[ Upstream commit 2f290b7c67 ]

The "rate" parameter in meson_clk_pll_set_rate() contains the new rate.
Retrieve the old rate with clk_hw_get_rate() so we don't inifinitely try
to switch from the new rate to the same rate again.

Fixes: 7a29a86943 ("clk: meson: Add support for Meson clock controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201226121556.975418-2-martin.blumenstingl@googlemail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

2021-03-03 18:22:44 +01:00

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at91

clk: at91: clk-main: update key before writing AT91_CKGR_MOR

2020-10-29 09:07:11 +01:00

axis

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axs10x

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bcm

clk: bcm2835: add missing release if devm_clk_hw_register fails

2020-10-29 09:07:11 +01:00

berlin

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h8300

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hisilicon

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imgtec

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imx

clk: vf610: fix refcount leak in vf610_clocks_init()

2020-01-27 14:46:10 +01:00

ingenic

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keystone

clk: keystone: Enable TISCI clocks if K3_ARCH

2019-11-24 08:22:58 +01:00

loongson1

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mediatek

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meson

clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL

2021-03-03 18:22:44 +01:00

microchip

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mmp

clk: mmp2: Fix the order of timer mux parents

2020-02-05 14:18:18 +00:00

mvebu

clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9

2020-12-29 13:47:10 +01:00

mxs

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nxp

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pistachio

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pxa

clk: pxa: fix one of the pxa RTC clocks

2020-01-04 13:59:45 +01:00

qcom

clk: qcom: msm8916: Fix the address location of pll->config_reg

2020-06-25 15:41:47 +02:00

renesas

clk: renesas: r8a77995: Correct parent clock of DU

2019-12-17 20:38:35 +01:00

rockchip

clk: rockchip: Fix initialization of mux_pll_src_4plls_p

2020-09-23 10:46:34 +02:00

samsung

clk: samsung: exynos4: mark 'chipid' clock as CLK_IGNORE_UNUSED

2020-10-14 09:51:08 +02:00

sirf

clk: clk-atlas6: fix return value check in atlas6_clk_init()

2020-08-21 09:48:21 +02:00

socfpga

clk: socfpga: fix refcount leak

2020-01-27 14:46:09 +01:00

spear

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st

clk: clk-flexgen: fix clock-critical handling

2020-06-25 15:41:49 +02:00

sunxi

clk: sunxi: Fix incorrect usage of round_down()

2020-06-25 15:41:47 +02:00

sunxi-ng

clk: sunxi-ng: Make sure divider tables have sentinel

2020-12-29 13:47:03 +01:00

tegra

clk: tegra: Fix duplicated SE clock entry

2020-12-29 13:47:01 +01:00

ti

clk: ti: Fix memleak in ti_fapll_synth_setup

2020-12-29 13:47:03 +01:00

uniphier

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ux500

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versatile

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x86

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zte

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zynq

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clk-asm9260.c

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clk-axi-clkgen.c

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clk-axm5516.c

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clk-bulk.c

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clk-cdce706.c

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clk-cdce925.c

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clk-clps711x.c

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clk-composite.c

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clk-conf.c

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clk-cs2000-cp.c

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clk-devres.c

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clk-divider.c

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clk-efm32gg.c

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clk-fixed-factor.c

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clk-fixed-rate.c

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clk-fractional-divider.c

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clk-gate.c

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clk-gemini.c

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clk-gpio.c

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clk-hi655x.c

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clk-highbank.c

clk: highbank: fix refcount leak in hb_clk_init()

2020-01-27 14:46:09 +01:00

clk-hsdk-pll.c

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clk-max77686.c

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clk-moxart.c

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clk-multiplier.c

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clk-mux.c

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clk-nomadik.c

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clk-nspire.c

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clk-oxnas.c

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clk-palmas.c

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clk-pwm.c

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clk-qoriq.c

clk: qoriq: fix refcount leak in clockgen_init()

2020-01-27 14:46:09 +01:00

clk-rk808.c

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clk-s2mps11.c

clk: s2mps11: Fix a resource leak in error handling paths in the probe function

2020-12-29 13:47:03 +01:00

clk-scpi.c

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clk-si514.c

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clk-si570.c

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clk-si5351.c

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clk-si5351.h

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clk-stm32f4.c

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clk-stm32h7.c

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clk-tango4.c

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clk-twl6040.c

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clk-u300.c

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clk-versaclock5.c

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clk-vt8500.c

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clk-wm831x.c

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clk-xgene.c

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clk.c

clk: Evict unregistered clks from parent caches

2020-08-26 10:30:00 +02:00

clk.h

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clkdev.c

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Kconfig

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Makefile

clk: keystone: Enable TISCI clocks if K3_ARCH

2019-11-24 08:22:58 +01:00