Max Filippov
608af5511a
[ Upstream commit494e87ffa0] When variant FSF is set, XCHAL_HAVE_DIV32 is not defined. Add default definition for that macro to prevent build warnings: arch/xtensa/lib/divsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef] 9 | #if XCHAL_HAVE_DIV32 arch/xtensa/lib/modsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef] 9 | #if XCHAL_HAVE_DIV32 Fixes:173d668138("xtensa: remove extra header files") Suggested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reported-by: kernel test robot <lkp@intel.com> Closes: lore.kernel.org/r/202309150556.t0yCdv3g-lkp@intel.com Signed-off-by: Sasha Levin <sashal@kernel.org>
43 lines
830 B
C
43 lines
830 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2019 Cadence Design Systems Inc. */
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#ifndef _ASM_XTENSA_CORE_H
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#define _ASM_XTENSA_CORE_H
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#include <variant/core.h>
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#ifndef XCHAL_HAVE_DIV32
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#define XCHAL_HAVE_DIV32 0
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#endif
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#ifndef XCHAL_HAVE_EXCLUSIVE
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#define XCHAL_HAVE_EXCLUSIVE 0
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#endif
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#ifndef XCHAL_HAVE_EXTERN_REGS
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#define XCHAL_HAVE_EXTERN_REGS 0
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#endif
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#ifndef XCHAL_HAVE_MPU
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#define XCHAL_HAVE_MPU 0
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#endif
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#ifndef XCHAL_HAVE_VECBASE
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#define XCHAL_HAVE_VECBASE 0
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#endif
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#ifndef XCHAL_SPANNING_WAY
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#define XCHAL_SPANNING_WAY 0
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#endif
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#ifndef XCHAL_HW_MIN_VERSION
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#if defined(XCHAL_HW_MIN_VERSION_MAJOR) && defined(XCHAL_HW_MIN_VERSION_MINOR)
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#define XCHAL_HW_MIN_VERSION (XCHAL_HW_MIN_VERSION_MAJOR * 100 + \
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XCHAL_HW_MIN_VERSION_MINOR)
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#else
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#define XCHAL_HW_MIN_VERSION 0
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#endif
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#endif
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#endif
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