Sudarshan Rajagopalan
673e9ab6b6
Reducing the section size helps reduce wastage of reserved memory for huge memory holes in sparsemem model. But having a much smaller section size bits could break PMD mappings for vmemmap and wouldn't accomodate the highest order page for certain page size granule configs. It is determined that SECTION_SIZE_BITS of 27 (128MB) could be ideal default value for 4K_PAGES that gives least section size without breaking PMD based vmemmap mappings. For simplicity, 16K_PAGES could follow the same as 4K_PAGES. And the least SECTION_SIZE_BITS for 64K_PAGES is 29 that could accomodate MAX_ORDER. Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org> Suggested-by: David Hildenbrand <david@redhat.com> Cc: Will Deacon <will@kernel.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Mike Rapoport <rppt@linux.ibm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Suren Baghdasaryan <surenb@google.com> Link: https://lore.kernel.org/lkml/15cf9a2359197fee0168f820c5c904650d07939e.1610146597.git.sudaraja@codeaurora.org/ Bug: 175715646 Signed-off-by: Suren Baghdasaryan <surenb@google.com> Change-Id: Iecc0369c595bcabe01182a85a5464c87df36c217
20 lines
439 B
C
20 lines
439 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_SPARSEMEM_H
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#define __ASM_SPARSEMEM_H
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#ifdef CONFIG_SPARSEMEM
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#define MAX_PHYSMEM_BITS CONFIG_ARM64_PA_BITS
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#if defined(CONFIG_ARM64_4K_PAGES) || defined(CONFIG_ARM64_16K_PAGES)
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#define SECTION_SIZE_BITS 27
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#else
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#define SECTION_SIZE_BITS 29
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#endif /* CONFIG_ARM64_4K_PAGES || CONFIG_ARM64_16K_PAGES */
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#endif /* CONFIG_SPARSEMEM*/
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#endif
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