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10 Commits

Author SHA1 Message Date
Heinrich Toews
19c463923c arch: arm: boot: dts: am335x-olimex-som-evb: adjust to new PINMUX interface
Signed-off-by: Heinrich Toews <ht@twx-software.de>
2025-10-08 19:43:52 +02:00
Heinrich Toews
6d9e5a3b4d arch: arm: boot: dts: add am335x-olimex-som-evb
Signed-off-by: Heinrich Toews <ht@twx-software.de>
2025-10-08 19:06:59 +02:00
Greg Kroah-Hartman
6282921b68 Linux 6.6.94
Link: https://lore.kernel.org/r/20250617152338.212798615@linuxfoundation.org
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Tested-by: Shuah Khan <skhan@linuxfoundation.org>
Tested-by: Peter Schneider <pschneider1968@googlemail.com>
Tested-by: Ron Economos <re@w6rz.net>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Mark Brown <broonie@kernel.org>
Tested-by: Miguel Ojeda <ojeda@kernel.org>
Tested-by: Hardik Garg <hargar@linux.microsoft.com>
Tested-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:47 +02:00
I Hsin Cheng
d0e22b854a drm/meson: Use 1000ULL when operating with mode->clock
commit eb0851e14432f3b87c77b704c835ac376deda03a upstream.

Coverity scan reported the usage of "mode->clock * 1000" may lead to
integer overflow. Use "1000ULL" instead of "1000"
when utilizing it to avoid potential integer overflow issue.

Link: https://scan5.scan.coverity.com/#/project-view/10074/10063?selectedIssue=1646759
Signed-off-by: I Hsin Cheng <richard120310@gmail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Fixes: 1017560164b6 ("drm/meson: use unsigned long long / Hz for frequency types")
Link: https://lore.kernel.org/r/20250505184338.678540-1-richard120310@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:47 +02:00
Oliver Neukum
65e20c5d99 net: usb: aqc111: debug info before sanitation
commit d3faab9b5a6a0477d69c38bd11c43aa5e936f929 upstream.

If we sanitize error returns, the debug statements need
to come before that so that we don't lose information.

Signed-off-by: Oliver Neukum <oneukum@suse.com>
Fixes: 405b0d610745 ("net: usb: aqc111: fix error handling of usbnet read calls")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
Nícolas F. R. A. Prado
0fcfc93576 regulator: dt-bindings: mt6357: Drop fixed compatible requirement
commit 9cfdd7752ba5f8cc9b8191e8c9aeeec246241fa4 upstream.

Some of the regulators on the MT6357 PMIC currently reference the
fixed-regulator dt-binding, which enforces the presence of a
regulator-fixed compatible. However since all regulators on the MT6357
PMIC are handled by a single mt6357-regulator driver, probed through
MFD, the compatibles don't serve any purpose. In fact they cause
failures in the DT kselftest since they aren't probed by the fixed
regulator driver as would be expected. Furthermore this is the only
dt-binding in this family like this: mt6359-regulator and
mt6358-regulator don't require those compatibles.

Commit d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed
compatibles") removed the compatibles from Devicetree, but missed
updating the binding, which still requires them, introducing dt-binding
errors. Remove the compatible requirement by referencing the plain
regulator dt-binding instead to fix the dt-binding errors.

Fixes: d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://patch.msgid.link/20250514-mt6357-regulator-fixed-compatibles-removal-bindings-v1-1-2421e9cc6cc7@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
Eric Dumazet
1380f68517 calipso: unlock rcu before returning -EAFNOSUPPORT
commit 3cae906e1a6184cdc9e4d260e4dbdf9a118d94ad upstream.

syzbot reported that a recent patch forgot to unlock rcu
in the error path.

Adopt the convention that netlbl_conn_setattr() is already using.

Fixes: 6e9f2df1c550 ("calipso: Don't call calipso functions for AF_INET sk.")
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Kuniyuki Iwashima <kuniyu@amazon.com>
Acked-by: Paul Moore <paul@paul-moore.com>
Link: https://patch.msgid.link/20250604133826.1667664-1-edumazet@google.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
Thomas Gleixner
2cfcbe1554 x86/iopl: Cure TIF_IO_BITMAP inconsistencies
commit 8b68e978718f14fdcb080c2a7791c52a0d09bc6d upstream.

io_bitmap_exit() is invoked from exit_thread() when a task exists or
when a fork fails. In the latter case the exit_thread() cleans up
resources which were allocated during fork().

io_bitmap_exit() invokes task_update_io_bitmap(), which in turn ends up
in tss_update_io_bitmap(). tss_update_io_bitmap() operates on the
current task. If current has TIF_IO_BITMAP set, but no bitmap installed,
tss_update_io_bitmap() crashes with a NULL pointer dereference.

There are two issues, which lead to that problem:

  1) io_bitmap_exit() should not invoke task_update_io_bitmap() when
     the task, which is cleaned up, is not the current task. That's a
     clear indicator for a cleanup after a failed fork().

  2) A task should not have TIF_IO_BITMAP set and neither a bitmap
     installed nor IOPL emulation level 3 activated.

     This happens when a kernel thread is created in the context of
     a user space thread, which has TIF_IO_BITMAP set as the thread
     flags are copied and the IO bitmap pointer is cleared.

     Other than in the failed fork() case this has no impact because
     kernel threads including IO workers never return to user space and
     therefore never invoke tss_update_io_bitmap().

Cure this by adding the missing cleanups and checks:

  1) Prevent io_bitmap_exit() to invoke task_update_io_bitmap() if
     the to be cleaned up task is not the current task.

  2) Clear TIF_IO_BITMAP in copy_thread() unconditionally. For user
     space forks it is set later, when the IO bitmap is inherited in
     io_bitmap_share().

For paranoia sake, add a warning into tss_update_io_bitmap() to catch
the case, when that code is invoked with inconsistent state.

Fixes: ea5f1cd7ab49 ("x86/ioperm: Remove bitmap if all permissions dropped")
Reported-by: syzbot+e2b1803445d236442e54@syzkaller.appspotmail.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/87wmdceom2.ffs@tglx
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
Stefano Stabellini
8884c41bae xen/arm: call uaccess_ttbr0_enable for dm_op hypercall
commit 7f9bbc1140ff8796230bc2634055763e271fd692 upstream.

dm_op hypercalls might come from userspace and pass memory addresses as
parameters. The memory addresses typically correspond to buffers
allocated in userspace to hold extra hypercall parameters.

On ARM, when CONFIG_ARM64_SW_TTBR0_PAN is enabled, they might not be
accessible by Xen, as a result ioreq hypercalls might fail. See the
existing comment in arch/arm64/xen/hypercall.S regarding privcmd_call
for reference.

For privcmd_call, Linux calls uaccess_ttbr0_enable before issuing the
hypercall thanks to commit 9cf09d68b89a. We need to do the same for
dm_op. This resolves the problem.

Cc: stable@kernel.org
Fixes: 9cf09d68b89a ("arm64: xen: Enable user access before a privcmd hvc call")
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Message-ID: <alpine.DEB.2.22.394.2505121446370.8380@ubuntu-linux-20-04-desktop>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
Amit Sunil Dhamne
b0e35d5639 usb: typec: tcpm/tcpci_maxim: Fix bounds check in process_rx()
commit 0736299d090f5c6a1032678705c4bc0a9511a3db upstream.

Register read of TCPC_RX_BYTE_CNT returns the total size consisting of:

  PD message (pending read) size + 1 Byte for Frame Type (SOP*)

This is validated against the max PD message (`struct pd_message`) size
without accounting for the extra byte for the frame type. Note that the
struct pd_message does not contain a field for the frame_type. This
results in false negatives when the "PD message (pending read)" is equal
to the max PD message size.

Fixes: 6f413b559f86 ("usb: typec: tcpci_maxim: Chip level TCPC driver")
Signed-off-by: Amit Sunil Dhamne <amitsd@google.com>
Signed-off-by: Badhri Jagan Sridharan <badhri@google.com>
Reviewed-by: Kyle Tso <kyletso@google.com>
Cc: stable <stable@kernel.org>
Link: https://lore.kernel.org/stable/20250502-b4-new-fix-pd-rx-count-v1-1-e5711ed09b3d%40google.com
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20250502-b4-new-fix-pd-rx-count-v1-1-e5711ed09b3d@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19 15:28:46 +02:00
16 changed files with 1497 additions and 27 deletions

@ -33,7 +33,7 @@ patternProperties:
"^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$":
type: object
$ref: fixed-regulator.yaml#
$ref: regulator.yaml#
unevaluatedProperties: false
description:
Properties for single fixed LDO regulator.
@ -112,7 +112,6 @@ examples:
regulator-enable-ramp-delay = <220>;
};
mt6357_vfe28_reg: ldo-vfe28 {
compatible = "regulator-fixed";
regulator-name = "vfe28";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
@ -125,14 +124,12 @@ examples:
regulator-enable-ramp-delay = <110>;
};
mt6357_vrf18_reg: ldo-vrf18 {
compatible = "regulator-fixed";
regulator-name = "vrf18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <110>;
};
mt6357_vrf12_reg: ldo-vrf12 {
compatible = "regulator-fixed";
regulator-name = "vrf12";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
@ -157,14 +154,12 @@ examples:
regulator-enable-ramp-delay = <264>;
};
mt6357_vcn28_reg: ldo-vcn28 {
compatible = "regulator-fixed";
regulator-name = "vcn28";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>;
};
mt6357_vcn18_reg: ldo-vcn18 {
compatible = "regulator-fixed";
regulator-name = "vcn18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@ -183,7 +178,6 @@ examples:
regulator-enable-ramp-delay = <264>;
};
mt6357_vcamio_reg: ldo-vcamio18 {
compatible = "regulator-fixed";
regulator-name = "vcamio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@ -212,28 +206,24 @@ examples:
regulator-always-on;
};
mt6357_vaux18_reg: ldo-vaux18 {
compatible = "regulator-fixed";
regulator-name = "vaux18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <264>;
};
mt6357_vaud28_reg: ldo-vaud28 {
compatible = "regulator-fixed";
regulator-name = "vaud28";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>;
};
mt6357_vio28_reg: ldo-vio28 {
compatible = "regulator-fixed";
regulator-name = "vio28";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>;
};
mt6357_vio18_reg: ldo-vio18 {
compatible = "regulator-fixed";
regulator-name = "vio18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 6
SUBLEVEL = 93
SUBLEVEL = 94
EXTRAVERSION =
NAME = Pinguïn Aangedreven

@ -117,7 +117,11 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-sbc-t335.dtb \
am335x-sl50.dtb \
am335x-wega-rdk.dtb \
am335x-osd3358-sm-red.dtb
am335x-osd3358-sm-red.dtb \
am335x-olimex-som.dtb \
am335x-olimex-som-nand.dtb \
am335x-olimex-som-evb.dtb \
am335x-olimex-som-evb-nand.dtb
dtb-$(CONFIG_SOC_AM43XX) += \
am43x-epos-evm.dtb \
am437x-cm-t43.dtb \

@ -0,0 +1,373 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "am335x-olimex-som-nand.dts"
/ {
model = "OLIMEX AM335x-SOM-EVB-NAND";
compatible = "olimex,am335x_som_evb_nand", "ti,am33xx";
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 1>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&evb_leds_pins_default>;
compatible = "gpio-leds";
led@1 {
label = "olimex-evb:red:led2";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@2 {
label = "olimex-evb:yellow:led3";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
};
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_default>;
enable-gpios = <&gpio3 19 0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <16>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
native-mode = <&timing2>;
timing0: 480x272 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <525>;
hback-porch = <8>;
vfront-porch = <576>;
vback-porch = <8>;
hsync-len = <30>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
};
timing1: 800x480 {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <209>;
hback-porch = <16>;
vfront-porch = <22>;
vback-porch = <22>;
hsync-len = <30>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
};
timing2: 800x600 {
clock-frequency = <40000000>;
hactive = <800>;
vactive = <600>;
hfront-porch = <44>;
hback-porch = <88>;
vfront-porch = <5>;
vback-porch = <19>;
hsync-len = <128>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
};
timing3: 1024x600 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <16>;
hback-porch = <150>;
vfront-porch = <2>;
vback-porch = <21>;
hsync-len = <10>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
};
&am33xx_pinmux{
backlight_pins_default: backlight_pins_default {
pinctrl-single,pins = <
0x164 ( PIN_OUTPUT | MUX_MODE0 ) /* (C18) eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
>;
};
dcan0_pins_default: dcan0_pins_default {
pinctrl-single,pins = <
0x17c ( PIN_INPUT | MUX_MODE2 ) /* (D17) uart1_rtsn.dcan0_rx */
0x178 ( PIN_OUTPUT | MUX_MODE2 ) /* (D18) uart1_ctsn.dcan0_tx */
>;
};
evb_leds_pins_default: evb_leds_pins_default {
pinctrl-single,pins = <
0x1a8 ( PIN_OUTPUT | MUX_MODE7 ) /* (D13) mcasp0_axr1.gpio3[20] */
0x1ac ( PIN_OUTPUT | MUX_MODE7 ) /* (A14) mcasp0_ahclkx.gpio3[21] */
>;
};
i2c0_pins_default: i2c0_pins_default {
pinctrl-single,pins = <
0x18c ( PIN_INPUT | MUX_MODE0 ) /* (C16) I2C0_SCL.I2C0_SCL */
0x188 ( PIN_INPUT | MUX_MODE0 ) /* (C17) I2C0_SDA.I2C0_SDA */
>;
};
mdio_pins_default: mdio_pins_default {
pinctrl-single,pins = <
0x14c ( PIN_OUTPUT | MUX_MODE0 ) /* (M18) mdio_clk.mdio_clk */
0x148 ( PIN_INPUT | MUX_MODE0 ) /* (M17) mdio_data.mdio_data */
>;
};
lcd_pins_default: lcd_pins_default {
pinctrl-single,pins = <
0xe0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U5) lcd_vsync.lcd_vsync */
0xe4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R5) lcd_hsync.lcd_hsync */
0xe8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V5) lcd_pclk.lcd_pclk */
0xec ( PIN_OUTPUT | MUX_MODE0 ) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
0xa0 ( PIN_OUTPUT | MUX_MODE0 ) /* (R1) lcd_data0.lcd_data0 */
0xa4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R2) lcd_data1.lcd_data1 */
0xa8 ( PIN_OUTPUT | MUX_MODE0 ) /* (R3) lcd_data2.lcd_data2 */
0xac ( PIN_OUTPUT | MUX_MODE0 ) /* (R4) lcd_data3.lcd_data3 */
0xb0 ( PIN_OUTPUT | MUX_MODE0 ) /* (T1) lcd_data4.lcd_data4 */
0xb4 ( PIN_OUTPUT | MUX_MODE0 ) /* (T2) lcd_data5.lcd_data5 */
0xb8 ( PIN_OUTPUT | MUX_MODE0 ) /* (T3) lcd_data6.lcd_data6 */
0xbc ( PIN_OUTPUT | MUX_MODE0 ) /* (T4) lcd_data7.lcd_data7 */
0xc0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U1) lcd_data8.lcd_data8 */
0xc4 ( PIN_OUTPUT | MUX_MODE0 ) /* (U2) lcd_data9.lcd_data9 */
0xc8 ( PIN_OUTPUT | MUX_MODE0 ) /* (U3) lcd_data10.lcd_data10 */
0xcc ( PIN_OUTPUT | MUX_MODE0 ) /* (U4) lcd_data11.lcd_data11 */
0xd0 ( PIN_OUTPUT | MUX_MODE0 ) /* (V2) lcd_data12.lcd_data12 */
0xd4 ( PIN_OUTPUT | MUX_MODE0 ) /* (V3) lcd_data13.lcd_data13 */
0xd8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V4) lcd_data14.lcd_data14 */
0xdc ( PIN_OUTPUT | MUX_MODE0 ) /* (T5) lcd_data15.lcd_data15 */
0x3c ( PIN_OUTPUT | MUX_MODE1 ) /* (U13) gpmc_ad15.lcd_data16 */
0x38 ( PIN_OUTPUT | MUX_MODE1 ) /* (V13) gpmc_ad14.lcd_data17 */
0x34 ( PIN_OUTPUT | MUX_MODE1 ) /* (R12) gpmc_ad13.lcd_data18 */
0x30 ( PIN_OUTPUT | MUX_MODE1 ) /* (T12) gpmc_ad12.lcd_data19 */
0x2c ( PIN_OUTPUT | MUX_MODE1 ) /* (U12) gpmc_ad11.lcd_data20 */
0x28 ( PIN_OUTPUT | MUX_MODE1 ) /* (T11) gpmc_ad10.lcd_data21 */
0x24 ( PIN_OUTPUT | MUX_MODE1 ) /* (T10) gpmc_ad9.lcd_data22 */
0x20 ( PIN_OUTPUT | MUX_MODE1 ) /* (U10) gpmc_ad8.lcd_data23 */
>;
};
phy1_pins_default: phy1_pins_default {
pinctrl-single,pins = <
0x108 ( PIN_INPUT | MUX_MODE0 ) /* (H16) gmii1_col.gmii1_col */
0x10c ( PIN_INPUT | MUX_MODE0 ) /* (H17) gmii1_crs.gmii1_crs */
0x110 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (J15) gmii1_rxer.gmii1_rxer */
0x114 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (J16) gmii1_txen.gmii1_txen */
0x118 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (J17) gmii1_rxdv.gmii1_rxdv */
0x12c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (K18) gmii1_txclk.gmii1_txclk */
0x130 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L18) gmii1_rxclk.gmii1_rxclk */
0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K17) gmii1_txd0.gmii1_txd0 */
0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K16) gmii1_txd1.gmii1_txd1 */
0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K15) gmii1_txd2.gmii1_txd2 */
0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (J18) gmii1_txd3.gmii1_txd3 */
0x140 ( PIN_INPUT | MUX_MODE0 ) /* (M16) gmii1_rxd0.gmii1_rxd0 */
0x13c ( PIN_INPUT | MUX_MODE0 ) /* (L15) gmii1_rxd1.gmii1_rxd1 */
0x138 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L16) gmii1_rxd2.gmii1_rxd2 */
0x134 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L17) gmii1_rxd3.gmii1_rxd3 */
>;
};
spi0_pins_default: spi0_pins_default {
pinctrl-single,pins = <
0x150 ( PIN_INPUT | MUX_MODE0 ) /* (A17) spi0_sclk.spi0_sclk */
0x154 ( PIN_INPUT | MUX_MODE0 ) /* (B17) spi0_d0.spi0_d0 */
0x158 ( PIN_OUTPUT | MUX_MODE0 ) /* (B16) spi0_d1.spi0_d1 */
0x15c ( PIN_OUTPUT | MUX_MODE0 ) /* (A16) spi0_cs0.spi0_cs0 */
>;
};
spi1_pins_default: spi1_pins_default {
pinctrl-single,pins = <
0x190 ( PIN_INPUT | MUX_MODE3 ) /* (A13) mcasp0_aclkx.spi1_sclk */
0x194 ( PIN_INPUT | MUX_MODE3 ) /* (B13) mcasp0_fsx.spi1_d0 */
0x198 ( PIN_OUTPUT | MUX_MODE3 ) /* (D12) mcasp0_axr0.spi1_d1 */
0x19c ( PIN_OUTPUT | MUX_MODE3 ) /* (C12) mcasp0_ahclkr.spi1_cs0 */
>;
};
uart1_pins_default: uart1_pins_default {
pinctrl-single,pins = <
0x180 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D16) uart1_rxd.uart1_rxd */
0x184 ( PIN_OUTPUT | MUX_MODE0 ) /* (D15) uart1_txd.uart1_txd */
>;
};
uart4_pins_default: uart4_pins_default {
pinctrl-single,pins = <
0x168 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (E18) uart0_ctsn.uart4_rxd */
0x16c ( PIN_OUTPUT | MUX_MODE1 ) /* (E17) uart0_rtsn.uart4_txd */
>;
};
usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
0x21c ( PIN_OUTPUT | MUX_MODE0 ) /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */
>;
};
};
&cppi41dma {
status = "okay";
};
&cpsw_emac0 {
status = "okay";
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&davinci_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default>;
};
&dcan0 {
pinctrl-names = "default";
pinctrl-0 = <&dcan0_pins_default>;
status = "okay";
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&backlight_pins_default>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_default>;
status = "okay";
};
&lcdc {
status = "okay";
};
&mac {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&phy1_pins_default>;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_default>;
spidev@0 {
spi-max-frequency = <24000000>;
reg = <0>;
compatible = "linux,spidev";
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins_default>;
spidev@0 {
spi-max-frequency = <24000000>;
reg = <0>;
compatible = "linux,spidev";
};
};
&tscadc {
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
};
adc {
ti,adc-channels = <0 1 2 3>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_default>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_default>;
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "peripheral";
};
&usb1_phy {
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
};

@ -0,0 +1,404 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am335x-olimex.dtsi"
/ {
model = "OLIMEX AM335x-SOM-EVB";
compatible = "olimex,am335x_som_evb", "ti,am33xx";
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 1>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&evb_leds_pins_default>;
compatible = "gpio-leds";
led@1 {
label = "olimex-evb:red:led2";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@2 {
label = "olimex-evb:yellow:led3";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
};
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_default>;
enable-gpios = <&gpio3 19 0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <16>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
native-mode = <&timing2>;
timing0: 480x272 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <525>;
hback-porch = <8>;
vfront-porch = <576>;
vback-porch = <8>;
hsync-len = <30>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
};
timing1: 800x480 {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <209>;
hback-porch = <16>;
vfront-porch = <22>;
vback-porch = <22>;
hsync-len = <30>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
};
timing2: 800x600 {
clock-frequency = <40000000>;
hactive = <800>;
vactive = <600>;
hfront-porch = <44>;
hback-porch = <88>;
vfront-porch = <5>;
vback-porch = <19>;
hsync-len = <128>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
};
timing3: 1024x600 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <16>;
hback-porch = <150>;
vfront-porch = <2>;
vback-porch = <21>;
hsync-len = <10>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
};
&am33xx_pinmux{
backlight_pins_default: backlight_pins_default {
pinctrl-single,pins = <
0x164 ( PIN_OUTPUT | MUX_MODE0 ) /* (C18) eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
>;
};
dcan0_pins_default: dcan0_pins_default {
pinctrl-single,pins = <
0x17c ( PIN_INPUT | MUX_MODE2 ) /* (D17) uart1_rtsn.dcan0_rx */
0x178 ( PIN_OUTPUT | MUX_MODE2 ) /* (D18) uart1_ctsn.dcan0_tx */
>;
};
evb_leds_pins_default: evb_leds_pins_default {
pinctrl-single,pins = <
0x1a8 ( PIN_OUTPUT | MUX_MODE7 ) /* (D13) mcasp0_axr1.gpio3[20] */
0x1ac ( PIN_OUTPUT | MUX_MODE7 ) /* (A14) mcasp0_ahclkx.gpio3[21] */
>;
};
i2c0_pins_default: i2c0_pins_default {
pinctrl-single,pins = <
0x18c ( PIN_INPUT | MUX_MODE0 ) /* (C16) I2C0_SCL.I2C0_SCL */
0x188 ( PIN_INPUT | MUX_MODE0 ) /* (C17) I2C0_SDA.I2C0_SDA */
>;
};
mdio_pins_default: mdio_pins_default {
pinctrl-single,pins = <
0x14c ( PIN_OUTPUT | MUX_MODE0 ) /* (M18) mdio_clk.mdio_clk */
0x148 ( PIN_INPUT | MUX_MODE0 ) /* (M17) mdio_data.mdio_data */
>;
};
lcd_pins_default: lcd_pins_default {
pinctrl-single,pins = <
0xe0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U5) lcd_vsync.lcd_vsync */
0xe4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R5) lcd_hsync.lcd_hsync */
0xe8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V5) lcd_pclk.lcd_pclk */
0xec ( PIN_OUTPUT | MUX_MODE0 ) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
0xa0 ( PIN_OUTPUT | MUX_MODE0 ) /* (R1) lcd_data0.lcd_data0 */
0xa4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R2) lcd_data1.lcd_data1 */
0xa8 ( PIN_OUTPUT | MUX_MODE0 ) /* (R3) lcd_data2.lcd_data2 */
0xac ( PIN_OUTPUT | MUX_MODE0 ) /* (R4) lcd_data3.lcd_data3 */
0xb0 ( PIN_OUTPUT | MUX_MODE0 ) /* (T1) lcd_data4.lcd_data4 */
0xb4 ( PIN_OUTPUT | MUX_MODE0 ) /* (T2) lcd_data5.lcd_data5 */
0xb8 ( PIN_OUTPUT | MUX_MODE0 ) /* (T3) lcd_data6.lcd_data6 */
0xbc ( PIN_OUTPUT | MUX_MODE0 ) /* (T4) lcd_data7.lcd_data7 */
0xc0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U1) lcd_data8.lcd_data8 */
0xc4 ( PIN_OUTPUT | MUX_MODE0 ) /* (U2) lcd_data9.lcd_data9 */
0xc8 ( PIN_OUTPUT | MUX_MODE0 ) /* (U3) lcd_data10.lcd_data10 */
0xcc ( PIN_OUTPUT | MUX_MODE0 ) /* (U4) lcd_data11.lcd_data11 */
0xd0 ( PIN_OUTPUT | MUX_MODE0 ) /* (V2) lcd_data12.lcd_data12 */
0xd4 ( PIN_OUTPUT | MUX_MODE0 ) /* (V3) lcd_data13.lcd_data13 */
0xd8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V4) lcd_data14.lcd_data14 */
0xdc ( PIN_OUTPUT | MUX_MODE0 ) /* (T5) lcd_data15.lcd_data15 */
0x3c ( PIN_OUTPUT | MUX_MODE1 ) /* (U13) gpmc_ad15.lcd_data16 */
0x38 ( PIN_OUTPUT | MUX_MODE1 ) /* (V13) gpmc_ad14.lcd_data17 */
0x34 ( PIN_OUTPUT | MUX_MODE1 ) /* (R12) gpmc_ad13.lcd_data18 */
0x30 ( PIN_OUTPUT | MUX_MODE1 ) /* (T12) gpmc_ad12.lcd_data19 */
0x2c ( PIN_OUTPUT | MUX_MODE1 ) /* (U12) gpmc_ad11.lcd_data20 */
0x28 ( PIN_OUTPUT | MUX_MODE1 ) /* (T11) gpmc_ad10.lcd_data21 */
0x24 ( PIN_OUTPUT | MUX_MODE1 ) /* (T10) gpmc_ad9.lcd_data22 */
0x20 ( PIN_OUTPUT | MUX_MODE1 ) /* (U10) gpmc_ad8.lcd_data23 */
>;
};
phy1_pins_default: phy1_pins_default {
pinctrl-single,pins = <
0x108 ( PIN_INPUT | MUX_MODE0 ) /* (H16) gmii1_col.gmii1_col */
0x10c ( PIN_INPUT | MUX_MODE0 ) /* (H17) gmii1_crs.gmii1_crs */
0x110 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (J15) gmii1_rxer.gmii1_rxer */
0x114 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (J16) gmii1_txen.gmii1_txen */
0x118 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (J17) gmii1_rxdv.gmii1_rxdv */
0x12c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (K18) gmii1_txclk.gmii1_txclk */
0x130 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L18) gmii1_rxclk.gmii1_rxclk */
0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K17) gmii1_txd0.gmii1_txd0 */
0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K16) gmii1_txd1.gmii1_txd1 */
0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (K15) gmii1_txd2.gmii1_txd2 */
0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (J18) gmii1_txd3.gmii1_txd3 */
0x140 ( PIN_INPUT | MUX_MODE0 ) /* (M16) gmii1_rxd0.gmii1_rxd0 */
0x13c ( PIN_INPUT | MUX_MODE0 ) /* (L15) gmii1_rxd1.gmii1_rxd1 */
0x138 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L16) gmii1_rxd2.gmii1_rxd2 */
0x134 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (L17) gmii1_rxd3.gmii1_rxd3 */
>;
};
phy2_pins_default: phy2_pins_default {
pinctrl-single,pins = <
0x78 ( PIN_INPUT | MUX_MODE1 ) /* (U18) gpmc_be1n.gmii2_col */
0x70 ( PIN_INPUT | MUX_MODE1 ) /* (T17) gpmc_wait0.gmii2_crs */
0x74 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (U17) gpmc_wpn.gmii2_rxer */
0x40 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (R13) gpmc_a0.gmii2_txen */
0x44 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (V14) gpmc_a1.gmii2_rxdv */
0x58 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (U15) gpmc_a6.gmii2_txclk */
0x5c ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (T15) gpmc_a7.gmii2_rxclk */
0x54 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (V15) gpmc_a5.gmii2_txd0 */
0x50 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (R14) gpmc_a4.gmii2_txd1 */
0x4c ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (T14) gpmc_a3.gmii2_txd2 */
0x48 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (U14) gpmc_a2.gmii2_txd3 */
0x6c ( PIN_INPUT | MUX_MODE1 ) /* (V17) gpmc_a11.gmii2_rxd0 */
0x68 ( PIN_INPUT | MUX_MODE1 ) /* (T16) gpmc_a10.gmii2_rxd1 */
0x64 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (U16) gpmc_a9.gmii2_rxd2 */
0x60 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (V16) gpmc_a8.gmii2_rxd3 */
>;
};
spi0_pins_default: spi0-default-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
spi1_pins_default: spi1_pins_default {
pinctrl-single,pins = <
0x190 ( PIN_INPUT | MUX_MODE3 ) /* (A13) mcasp0_aclkx.spi1_sclk */
0x194 ( PIN_INPUT | MUX_MODE3 ) /* (B13) mcasp0_fsx.spi1_d0 */
0x198 ( PIN_OUTPUT | MUX_MODE3 ) /* (D12) mcasp0_axr0.spi1_d1 */
0x19c ( PIN_OUTPUT | MUX_MODE3 ) /* (C12) mcasp0_ahclkr.spi1_cs0 */
>;
};
uart1_pins_default: uart1_pins_default {
pinctrl-single,pins = <
0x180 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D16) uart1_rxd.uart1_rxd */
0x184 ( PIN_OUTPUT | MUX_MODE0 ) /* (D15) uart1_txd.uart1_txd */
>;
};
uart4_pins_default: uart4_pins_default {
pinctrl-single,pins = <
0x168 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (E18) uart0_ctsn.uart4_rxd */
0x16c ( PIN_OUTPUT | MUX_MODE1 ) /* (E17) uart0_rtsn.uart4_txd */
>;
};
usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
0x21c ( PIN_OUTPUT | MUX_MODE0 ) /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */
>;
};
};
&cppi41dma {
status = "okay";
};
&cpsw_emac0 {
status = "okay";
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
status = "okay";
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default>;
};
&dcan0 {
pinctrl-names = "default";
pinctrl-0 = <&dcan0_pins_default>;
status = "okay";
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&backlight_pins_default>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_default>;
status = "okay";
};
&lcdc {
status = "okay";
};
&mac {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&phy1_pins_default>,<&phy2_pins_default>;
dual_emac = <1>;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_default>;
spidev@0 {
spi-max-frequency = <24000000>;
reg = <0>;
compatible = "linux,spidev";
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins_default>;
spidev@0 {
spi-max-frequency = <24000000>;
reg = <0>;
compatible = "linux,spidev";
};
};
&tscadc {
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
};
adc {
ti,adc-channels = <0 1 2 3>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_default>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_default>;
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "peripheral";
};
&usb1_phy {
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
};

@ -0,0 +1,127 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am335x-olimex.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "OLIMEX AM335x-SOM-NAND";
compatible = "olimex,am335x_som_nand", "ti,am33xx";
};
&am33xx_pinmux {
nandflash_pins_default: nandflash_pins_default {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
};
&gpmc {
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_default>;
ranges = <0 0 0x08000000 0x20000000>;
status = "okay";
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>;
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE_NONE>;
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
ti,elm-id = <&elm>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00A00000 0x1F600000>;
};
};
};
&elm {
status = "okay";
};

@ -0,0 +1,15 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am335x-olimex.dtsi"
/ {
model = "OLIMEX AM335x-SOM";
compatible = "olimex,am335x_som", "ti,am33xx";
};

@ -0,0 +1,95 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "am33xx.dtsi"
/ {
chosen {
stdout-path = &uart0;
tick-timer = &timer2;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pins_default>;
compatible = "gpio-leds";
led@0 {
label = "olimex-som:green:led1";
gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
dummy_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "dummy_regulator";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&aes {
status = "okay";
};
&am33xx_pinmux {
mmc1_pins_default: mmc0-default-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7)
>;
};
uart0_pins_default: uart0_pins_default {
pinctrl-single,pins = <
0x170 ( PIN_INPUT | MUX_MODE0 ) /* (E15) uart0_rxd.uart0_rxd */
0x174 ( PIN_OUTPUT | MUX_MODE0 ) /* (E16) uart0_txd.uart0_txd */
>;
};
usr_led_pins_default: usr_led_pins_default {
pinctrl-single,pins = <
0x1a0 ( PIN_OUTPUT | MUX_MODE7 ) /* (B12) mcasp0_aclkr.gpio3[18] */
>;
};
};
&mmc1 {
status = "okay";
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
vmmc-supply = <&dummy_reg>;
cd-debounce-delay-ms = <7>;
};
&sham {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_default>;
status = "okay";
};

@ -0,0 +1,429 @@
CONFIG_KERNEL_LZO=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT=y
# CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set
CONFIG_PREEMPT_RT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
CONFIG_KEXEC=y
CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_AM33XX=y
CONFIG_WAGO_SYSTEM_BASED_STARTUP=y
# CONFIG_SOC_OMAP3430 is not set
# CONFIG_SOC_TI81XX is not set
CONFIG_ARM_THUMBEE=y
CONFIG_SWP_EMULATE=y
CONFIG_ARCH_FORCE_MAX_ORDER=12
CONFIG_UACCESS_WITH_MEMCPY=y
# CONFIG_ATAGS is not set
CONFIG_CPU_FREQ=y
CONFIG_CPUFREQ_DT=y
# CONFIG_SUSPEND is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_THROTTLING=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_MAC_PARTITION=y
# CONFIG_MQ_IOSCHED_KYBER is not set
# CONFIG_IOSCHED_BFQ is not set
CONFIG_BINFMT_MISC=y
# CONFIG_SWAP is not set
# CONFIG_COMPAT_BRK is not set
# CONFIG_COMPACTION is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_XDP_SOCKETS=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_SYN_COOKIES=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
CONFIG_TCP_CONG_ADVANCED=y
# CONFIG_TCP_CONG_BIC is not set
# CONFIG_TCP_CONG_WESTWOOD is not set
# CONFIG_TCP_CONG_HTCP is not set
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MIP6=m
CONFIG_IPV6_SIT=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_IPV6_MROUTE=y
CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
CONFIG_IPV6_PIMSM_V2=y
CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_MARK=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_SNMP=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_ESP=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_IPVS=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_IP_VS=m
CONFIG_IP_VS_PROTO_TCP=y
CONFIG_IP_VS_PROTO_UDP=y
CONFIG_IP_VS_RR=m
CONFIG_IP_VS_WRR=m
CONFIG_IP_VS_NFCT=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_MATCH_FRAG=m
CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_HL=m
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
CONFIG_IP6_NF_MATCH_MH=m
CONFIG_IP6_NF_MATCH_RPFILTER=m
CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_TARGET_HL=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_BRIDGE_NF_EBTABLES=y
CONFIG_BRIDGE_EBT_BROUTE=y
CONFIG_BRIDGE_EBT_T_FILTER=y
CONFIG_BRIDGE_EBT_T_NAT=y
CONFIG_BRIDGE_EBT_IP=y
CONFIG_BRIDGE_EBT_LIMIT=y
CONFIG_BRIDGE_EBT_LOG=y
CONFIG_BRIDGE=y
CONFIG_NET_DSA=y
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_HFSC=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_SCH_TBF=y
CONFIG_NET_SCH_CODEL=y
CONFIG_NET_SCH_FQ_CODEL=y
CONFIG_NET_SCH_INGRESS=y
CONFIG_NET_CLS_BASIC=y
CONFIG_NET_CLS_ROUTE4=y
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
CONFIG_CLS_U32_PERF=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_FLOW=y
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_FLOWER=y
CONFIG_NET_CLS_MATCHALL=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_CMP=y
CONFIG_NET_EMATCH_NBYTE=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_EMATCH_META=y
CONFIG_NET_EMATCH_TEXT=y
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=y
CONFIG_NET_ACT_GACT=y
CONFIG_GACT_PROB=y
CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_IPT=y
CONFIG_NET_ACT_NAT=y
CONFIG_NET_ACT_PEDIT=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_NET_ACT_CSUM=y
CONFIG_NETLINK_DIAG=y
CONFIG_CGROUP_NET_PRIO=y
CONFIG_CAN=y
# CONFIG_CAN_GW is not set
CONFIG_AF_RXRPC=y
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_OMAP_OCP2SCP=y
CONFIG_CONNECTOR=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=m
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_PLATRAM=m
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_OMAP2=y
CONFIG_MTD_NAND_OMAP_BCH=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND_ECC_SW_BCH=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_TI_SN74LV165A=y
CONFIG_EEPROM_AT24=y
CONFIG_SCSI=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SCAN_ASYNC=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_DUMMY=m
CONFIG_MACVLAN=m
CONFIG_IPVLAN=m
CONFIG_VXLAN=m
CONFIG_TUN=y
CONFIG_VETH=m
CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=y
CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=y
CONFIG_NET_DSA_MV88E6XXX=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_TI_DAVINCI_EMAC=y
CONFIG_TI_CPSW=y
CONFIG_TI_CPSW_SWITCHDEV=y
CONFIG_TI_CPTS=y
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_INTEL_XWAY_PHY=y
CONFIG_MARVELL_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_CAN_VCAN=y
CONFIG_CAN_TI_HECC=y
CONFIG_CAN_C_CAN=y
CONFIG_CAN_C_CAN_PLATFORM=y
CONFIG_MDIO_GPIO=y
CONFIG_PPP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_USBNET=y
# CONFIG_USB_NET_AX8817X is not set
# CONFIG_USB_NET_AX88179_178A is not set
# CONFIG_USB_NET_CDCETHER is not set
# CONFIG_USB_NET_CDC_NCM is not set
# CONFIG_USB_NET_NET1080 is not set
# CONFIG_USB_NET_CDC_SUBSET is not set
# CONFIG_USB_NET_ZAURUS is not set
CONFIG_USB_NET_QMI_WWAN=y
# CONFIG_WLAN is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_OMAP=y
CONFIG_SERIAL_OMAP_RTU=y
CONFIG_SERIAL_OMAP_CONSOLE=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA9541=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SPI=y
CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_KBUS=y
CONFIG_SPI_SPIDEV=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_TWL4030=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_SYSFS=y
CONFIG_GPIO_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_MFD_TI_AM335X_TSCADC=y
CONFIG_MFD_TPS65218=y
CONFIG_MFD_TPS65910=y
CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TPS65218=y
CONFIG_REGULATOR_TPS65910=y
# CONFIG_HID_GENERIC is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_INVENTRA_DMA=y
CONFIG_USB_TI_CPPI41_DMA=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_QUALCOMM=y
CONFIG_USB_SERIAL_OPTION=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_AM335X_PHY_USB=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_SDHCI_OMAP=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PCA955X=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RS5C372=y
CONFIG_RTC_DRV_ISL1208=y
CONFIG_DMADEVICES=y
CONFIG_ASYNC_TX_DMA=y
CONFIG_UIO=y
CONFIG_UIO_PDRV_GENIRQ=y
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VHOST_MENU is not set
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_PWM=y
CONFIG_PWM_TIECAP=y
CONFIG_PWM_TIEHRPWM=y
CONFIG_OMAP_USB2=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_FANOTIFY=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
CONFIG_NTFS_RW=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
# CONFIG_UBIFS_FS_ZLIB is not set
# CONFIG_UBIFS_FS_ZSTD is not set
# CONFIG_UBIFS_FS_XATTR is not set
CONFIG_SQUASHFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf"
CONFIG_CRYPTO_USER=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_CAMELLIA=y
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_DEV_OMAP=y
CONFIG_CRYPTO_DEV_OMAP_SHAM=y
CONFIG_CRYPTO_DEV_OMAP_AES=y
CONFIG_CRYPTO_DEV_OMAP_DES=y
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_X509_CERTIFICATE_PARSER=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=y
CONFIG_XZ_DEC=y
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_PREEMPT=y
CONFIG_FUNCTION_TRACER=y
# CONFIG_UPROBE_EVENTS is not set
CONFIG_UNWINDER_FRAME_POINTER=y
# CONFIG_RUNTIME_TESTING_MENU is not set

@ -83,7 +83,26 @@ HYPERCALL3(vcpu_op);
HYPERCALL1(platform_op_raw);
HYPERCALL2(multicall);
HYPERCALL2(vm_assist);
HYPERCALL3(dm_op);
SYM_FUNC_START(HYPERVISOR_dm_op)
mov x16, #__HYPERVISOR_dm_op; \
/*
* dm_op hypercalls are issued by the userspace. The kernel needs to
* enable access to TTBR0_EL1 as the hypervisor would issue stage 1
* translations to user memory via AT instructions. Since AT
* instructions are not affected by the PAN bit (ARMv8.1), we only
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
* is enabled (it implies that hardware UAO and PAN disabled).
*/
uaccess_ttbr0_enable x6, x7, x8
hvc XEN_IMM
/*
* Disable userspace access from kernel once the hyp call completed.
*/
uaccess_ttbr0_disable x6, x7
ret
SYM_FUNC_END(HYPERVISOR_dm_op);
SYM_FUNC_START(privcmd_call)
mov x16, x0

@ -33,8 +33,9 @@ void io_bitmap_share(struct task_struct *tsk)
set_tsk_thread_flag(tsk, TIF_IO_BITMAP);
}
static void task_update_io_bitmap(struct task_struct *tsk)
static void task_update_io_bitmap(void)
{
struct task_struct *tsk = current;
struct thread_struct *t = &tsk->thread;
if (t->iopl_emul == 3 || t->io_bitmap) {
@ -54,7 +55,12 @@ void io_bitmap_exit(struct task_struct *tsk)
struct io_bitmap *iobm = tsk->thread.io_bitmap;
tsk->thread.io_bitmap = NULL;
task_update_io_bitmap(tsk);
/*
* Don't touch the TSS when invoked on a failed fork(). TSS
* reflects the state of @current and not the state of @tsk.
*/
if (tsk == current)
task_update_io_bitmap();
if (iobm && refcount_dec_and_test(&iobm->refcnt))
kfree(iobm);
}
@ -192,8 +198,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
}
t->iopl_emul = level;
task_update_io_bitmap(current);
task_update_io_bitmap();
return 0;
}

@ -180,6 +180,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
frame->ret_addr = (unsigned long) ret_from_fork_asm;
p->thread.sp = (unsigned long) fork_frame;
p->thread.io_bitmap = NULL;
clear_tsk_thread_flag(p, TIF_IO_BITMAP);
p->thread.iopl_warn = 0;
memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
@ -468,6 +469,11 @@ void native_tss_update_io_bitmap(void)
} else {
struct io_bitmap *iobm = t->io_bitmap;
if (WARN_ON_ONCE(!iobm)) {
clear_thread_flag(TIF_IO_BITMAP);
native_tss_invalidate_io_bitmap();
}
/*
* Only copy bitmap data when the sequence number differs. The
* update time is accounted to the incoming task.

@ -75,7 +75,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
unsigned long long venc_freq;
unsigned long long hdmi_freq;
vclk_freq = mode->clock * 1000;
vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@ -123,7 +123,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
unsigned long long clock = mode->clock * 1000;
unsigned long long clock = mode->clock * 1000ULL;
unsigned long long phy_freq;
unsigned long long vclk_freq;
unsigned long long venc_freq;

@ -31,11 +31,11 @@ static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
USB_RECIP_DEVICE, value, index, data, size);
if (unlikely(ret < size)) {
ret = ret < 0 ? ret : -ENODATA;
netdev_warn(dev->net,
"Failed to read(0x%x) reg index 0x%04x: %d\n",
cmd, index, ret);
ret = ret < 0 ? ret : -ENODATA;
}
return ret;
@ -50,11 +50,11 @@ static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,
USB_RECIP_DEVICE, value, index, data, size);
if (unlikely(ret < size)) {
ret = ret < 0 ? ret : -ENODATA;
netdev_warn(dev->net,
"Failed to read(0x%x) reg index 0x%04x: %d\n",
cmd, index, ret);
ret = ret < 0 ? ret : -ENODATA;
}
return ret;

@ -145,7 +145,8 @@ static void process_rx(struct max_tcpci_chip *chip, u16 status)
return;
}
if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
if (count > sizeof(struct pd_message) + 1 ||
count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
return;
}

@ -1140,8 +1140,10 @@ int netlbl_conn_setattr(struct sock *sk,
break;
#if IS_ENABLED(CONFIG_IPV6)
case AF_INET6:
if (sk->sk_family != AF_INET6)
return -EAFNOSUPPORT;
if (sk->sk_family != AF_INET6) {
ret_val = -EAFNOSUPPORT;
goto conn_setattr_return;
}
addr6 = (struct sockaddr_in6 *)addr;
entry = netlbl_domhsh_getentry_af6(secattr->domain,