dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
Sync defines with the latest available SCFW kit version 1.13.0, may be found at the address below: https://www.nxp.com/webapp/Download?colCode=L5.15.32_2.0.0_SCFWKIT-1.13.0&appType=license Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Viorel Suman
Shawn Guo
parent
9abf2313ad
commit
f5798ced41
@ -13,30 +13,30 @@
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* never be changed or removed (only added to at the end of the list).
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*/
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#define IMX_SC_R_A53 0
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#define IMX_SC_R_A53_0 1
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#define IMX_SC_R_A53_1 2
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#define IMX_SC_R_A53_2 3
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#define IMX_SC_R_A53_3 4
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#define IMX_SC_R_A72 5
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#define IMX_SC_R_A72_0 6
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#define IMX_SC_R_A72_1 7
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#define IMX_SC_R_A72_2 8
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#define IMX_SC_R_A72_3 9
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#define IMX_SC_R_AP_0 0
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#define IMX_SC_R_AP_0_0 1
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#define IMX_SC_R_AP_0_1 2
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#define IMX_SC_R_AP_0_2 3
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#define IMX_SC_R_AP_0_3 4
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#define IMX_SC_R_AP_1 5
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#define IMX_SC_R_AP_1_0 6
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#define IMX_SC_R_AP_1_1 7
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#define IMX_SC_R_AP_1_2 8
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#define IMX_SC_R_AP_1_3 9
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#define IMX_SC_R_CCI 10
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#define IMX_SC_R_DB 11
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#define IMX_SC_R_DRC_0 12
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#define IMX_SC_R_DRC_1 13
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#define IMX_SC_R_GIC_SMMU 14
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#define IMX_SC_R_IRQSTR_M4_0 15
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#define IMX_SC_R_IRQSTR_M4_1 16
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#define IMX_SC_R_SMMU 17
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#define IMX_SC_R_GIC 18
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#define IMX_SC_R_IRQSTR_MCU_0 15
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#define IMX_SC_R_IRQSTR_MCU_1 16
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#define IMX_SC_R_SMMU_0 17
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#define IMX_SC_R_GIC_0 18
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#define IMX_SC_R_DC_0_BLIT0 19
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#define IMX_SC_R_DC_0_BLIT1 20
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#define IMX_SC_R_DC_0_BLIT2 21
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#define IMX_SC_R_DC_0_BLIT_OUT 22
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#define IMX_SC_R_PERF 23
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#define IMX_SC_R_PERF_0 23
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#define IMX_SC_R_USB_1_PHY 24
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#define IMX_SC_R_DC_0_WARP 25
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#define IMX_SC_R_V2X_MU_0 26
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@ -56,11 +56,14 @@
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#define IMX_SC_R_V2X_MU_3 40
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#define IMX_SC_R_V2X_MU_4 41
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#define IMX_SC_R_DC_1_WARP 42
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#define IMX_SC_R_STM 43
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#define IMX_SC_R_SECVIO 44
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#define IMX_SC_R_DC_1_VIDEO0 45
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#define IMX_SC_R_DC_1_VIDEO1 46
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#define IMX_SC_R_DC_1_FRAC0 47
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#define IMX_SC_R_V2X 48
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#define IMX_SC_R_DC_1 49
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#define IMX_SC_R_UNUSED14 50
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#define IMX_SC_R_DC_1_PLL_0 51
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#define IMX_SC_R_DC_1_PLL_1 52
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#define IMX_SC_R_SPI_0 53
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@ -151,10 +154,10 @@
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#define IMX_SC_R_DMA_1_CH29 137
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#define IMX_SC_R_DMA_1_CH30 138
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#define IMX_SC_R_DMA_1_CH31 139
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#define IMX_SC_R_UNUSED1 140
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#define IMX_SC_R_UNUSED2 141
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#define IMX_SC_R_UNUSED3 142
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#define IMX_SC_R_UNUSED4 143
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#define IMX_SC_R_V2X_PID0 140
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#define IMX_SC_R_V2X_PID1 141
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#define IMX_SC_R_V2X_PID2 142
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#define IMX_SC_R_V2X_PID3 143
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#define IMX_SC_R_GPU_0_PID0 144
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#define IMX_SC_R_GPU_0_PID1 145
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#define IMX_SC_R_GPU_0_PID2 146
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@ -183,7 +186,7 @@
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#define IMX_SC_R_PCIE_B 169
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#define IMX_SC_R_SATA_0 170
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#define IMX_SC_R_SERDES_1 171
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#define IMX_SC_R_HSIO_GPIO 172
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#define IMX_SC_R_HSIO_GPIO_0 172
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#define IMX_SC_R_MATCH_15 173
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#define IMX_SC_R_MATCH_16 174
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#define IMX_SC_R_MATCH_17 175
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@ -250,15 +253,15 @@
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#define IMX_SC_R_ROM_0 236
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#define IMX_SC_R_FSPI_0 237
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#define IMX_SC_R_FSPI_1 238
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#define IMX_SC_R_IEE 239
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#define IMX_SC_R_IEE_R0 240
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#define IMX_SC_R_IEE_R1 241
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#define IMX_SC_R_IEE_R2 242
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#define IMX_SC_R_IEE_R3 243
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#define IMX_SC_R_IEE_R4 244
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#define IMX_SC_R_IEE_R5 245
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#define IMX_SC_R_IEE_R6 246
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#define IMX_SC_R_IEE_R7 247
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#define IMX_SC_R_IEE_0 239
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#define IMX_SC_R_IEE_0_R0 240
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#define IMX_SC_R_IEE_0_R1 241
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#define IMX_SC_R_IEE_0_R2 242
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#define IMX_SC_R_IEE_0_R3 243
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#define IMX_SC_R_IEE_0_R4 244
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#define IMX_SC_R_IEE_0_R5 245
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#define IMX_SC_R_IEE_0_R6 246
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#define IMX_SC_R_IEE_0_R7 247
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#define IMX_SC_R_SDHC_0 248
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#define IMX_SC_R_SDHC_1 249
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#define IMX_SC_R_SDHC_2 250
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@ -289,46 +292,50 @@
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#define IMX_SC_R_LVDS_2_PWM_0 275
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#define IMX_SC_R_LVDS_2_I2C_0 276
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#define IMX_SC_R_LVDS_2_I2C_1 277
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#define IMX_SC_R_M4_0_PID0 278
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#define IMX_SC_R_M4_0_PID1 279
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#define IMX_SC_R_M4_0_PID2 280
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#define IMX_SC_R_M4_0_PID3 281
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#define IMX_SC_R_M4_0_PID4 282
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#define IMX_SC_R_M4_0_RGPIO 283
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#define IMX_SC_R_M4_0_SEMA42 284
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#define IMX_SC_R_M4_0_TPM 285
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#define IMX_SC_R_M4_0_PIT 286
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#define IMX_SC_R_M4_0_UART 287
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#define IMX_SC_R_M4_0_I2C 288
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#define IMX_SC_R_M4_0_INTMUX 289
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#define IMX_SC_R_M4_0_MU_0B 292
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#define IMX_SC_R_M4_0_MU_0A0 293
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#define IMX_SC_R_M4_0_MU_0A1 294
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#define IMX_SC_R_M4_0_MU_0A2 295
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#define IMX_SC_R_M4_0_MU_0A3 296
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#define IMX_SC_R_M4_0_MU_1A 297
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#define IMX_SC_R_M4_1_PID0 298
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#define IMX_SC_R_M4_1_PID1 299
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#define IMX_SC_R_M4_1_PID2 300
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#define IMX_SC_R_M4_1_PID3 301
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#define IMX_SC_R_M4_1_PID4 302
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#define IMX_SC_R_M4_1_RGPIO 303
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#define IMX_SC_R_M4_1_SEMA42 304
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#define IMX_SC_R_M4_1_TPM 305
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#define IMX_SC_R_M4_1_PIT 306
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#define IMX_SC_R_M4_1_UART 307
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#define IMX_SC_R_M4_1_I2C 308
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#define IMX_SC_R_M4_1_INTMUX 309
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#define IMX_SC_R_M4_1_MU_0B 312
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#define IMX_SC_R_M4_1_MU_0A0 313
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#define IMX_SC_R_M4_1_MU_0A1 314
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#define IMX_SC_R_M4_1_MU_0A2 315
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#define IMX_SC_R_M4_1_MU_0A3 316
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#define IMX_SC_R_M4_1_MU_1A 317
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#define IMX_SC_R_MCU_0_PID0 278
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#define IMX_SC_R_MCU_0_PID1 279
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#define IMX_SC_R_MCU_0_PID2 280
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#define IMX_SC_R_MCU_0_PID3 281
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#define IMX_SC_R_MCU_0_PID4 282
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#define IMX_SC_R_MCU_0_RGPIO 283
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#define IMX_SC_R_MCU_0_SEMA42 284
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#define IMX_SC_R_MCU_0_TPM 285
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#define IMX_SC_R_MCU_0_PIT 286
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#define IMX_SC_R_MCU_0_UART 287
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#define IMX_SC_R_MCU_0_I2C 288
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#define IMX_SC_R_MCU_0_INTMUX 289
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#define IMX_SC_R_ENET_0_A0 290
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#define IMX_SC_R_ENET_0_A1 291
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#define IMX_SC_R_MCU_0_MU_0B 292
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#define IMX_SC_R_MCU_0_MU_0A0 293
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#define IMX_SC_R_MCU_0_MU_0A1 294
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#define IMX_SC_R_MCU_0_MU_0A2 295
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#define IMX_SC_R_MCU_0_MU_0A3 296
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#define IMX_SC_R_MCU_0_MU_1A 297
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#define IMX_SC_R_MCU_1_PID0 298
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#define IMX_SC_R_MCU_1_PID1 299
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#define IMX_SC_R_MCU_1_PID2 300
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#define IMX_SC_R_MCU_1_PID3 301
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#define IMX_SC_R_MCU_1_PID4 302
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#define IMX_SC_R_MCU_1_RGPIO 303
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#define IMX_SC_R_MCU_1_SEMA42 304
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#define IMX_SC_R_MCU_1_TPM 305
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#define IMX_SC_R_MCU_1_PIT 306
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#define IMX_SC_R_MCU_1_UART 307
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#define IMX_SC_R_MCU_1_I2C 308
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#define IMX_SC_R_MCU_1_INTMUX 309
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#define IMX_SC_R_UNUSED17 310
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#define IMX_SC_R_UNUSED18 311
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#define IMX_SC_R_MCU_1_MU_0B 312
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#define IMX_SC_R_MCU_1_MU_0A0 313
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#define IMX_SC_R_MCU_1_MU_0A1 314
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#define IMX_SC_R_MCU_1_MU_0A2 315
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#define IMX_SC_R_MCU_1_MU_0A3 316
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#define IMX_SC_R_MCU_1_MU_1A 317
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#define IMX_SC_R_SAI_0 318
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#define IMX_SC_R_SAI_1 319
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#define IMX_SC_R_SAI_2 320
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#define IMX_SC_R_IRQSTR_SCU2 321
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#define IMX_SC_R_IRQSTR_AP_0 321
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#define IMX_SC_R_IRQSTR_DSP 322
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#define IMX_SC_R_ELCDIF_PLL 323
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#define IMX_SC_R_OCRAM 324
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@ -373,33 +380,33 @@
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#define IMX_SC_R_VPU_PID5 363
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#define IMX_SC_R_VPU_PID6 364
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#define IMX_SC_R_VPU_PID7 365
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#define IMX_SC_R_VPU_UART 366
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#define IMX_SC_R_VPUCORE 367
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#define IMX_SC_R_VPUCORE_0 368
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#define IMX_SC_R_VPUCORE_1 369
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#define IMX_SC_R_VPUCORE_2 370
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#define IMX_SC_R_VPUCORE_3 371
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#define IMX_SC_R_ENET_0_A2 366
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#define IMX_SC_R_ENET_1_A0 367
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#define IMX_SC_R_ENET_1_A1 368
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#define IMX_SC_R_ENET_1_A2 369
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#define IMX_SC_R_ENET_1_A3 370
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#define IMX_SC_R_ENET_1_A4 371
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#define IMX_SC_R_DMA_4_CH0 372
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#define IMX_SC_R_DMA_4_CH1 373
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#define IMX_SC_R_DMA_4_CH2 374
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#define IMX_SC_R_DMA_4_CH3 375
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#define IMX_SC_R_DMA_4_CH4 376
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#define IMX_SC_R_ISI_CH0 377
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#define IMX_SC_R_ISI_CH1 378
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#define IMX_SC_R_ISI_CH2 379
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#define IMX_SC_R_ISI_CH3 380
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#define IMX_SC_R_ISI_CH4 381
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#define IMX_SC_R_ISI_CH5 382
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#define IMX_SC_R_ISI_CH6 383
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#define IMX_SC_R_ISI_CH7 384
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#define IMX_SC_R_MJPEG_DEC_S0 385
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#define IMX_SC_R_MJPEG_DEC_S1 386
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#define IMX_SC_R_MJPEG_DEC_S2 387
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#define IMX_SC_R_MJPEG_DEC_S3 388
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#define IMX_SC_R_MJPEG_ENC_S0 389
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#define IMX_SC_R_MJPEG_ENC_S1 390
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#define IMX_SC_R_MJPEG_ENC_S2 391
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#define IMX_SC_R_MJPEG_ENC_S3 392
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#define IMX_SC_R_ISI_0_CH0 377
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#define IMX_SC_R_ISI_0_CH1 378
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#define IMX_SC_R_ISI_0_CH2 379
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#define IMX_SC_R_ISI_0_CH3 380
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#define IMX_SC_R_ISI_0_CH4 381
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#define IMX_SC_R_ISI_0_CH5 382
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#define IMX_SC_R_ISI_0_CH6 383
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#define IMX_SC_R_ISI_0_CH7 384
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#define IMX_SC_R_MJPEG_0_DEC_S0 385
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#define IMX_SC_R_MJPEG_0_DEC_S1 386
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#define IMX_SC_R_MJPEG_0_DEC_S2 387
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#define IMX_SC_R_MJPEG_0_DEC_S3 388
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#define IMX_SC_R_MJPEG_0_ENC_S0 389
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#define IMX_SC_R_MJPEG_0_ENC_S1 390
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#define IMX_SC_R_MJPEG_0_ENC_S2 391
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#define IMX_SC_R_MJPEG_0_ENC_S3 392
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#define IMX_SC_R_MIPI_0 393
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#define IMX_SC_R_MIPI_0_PWM_0 394
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#define IMX_SC_R_MIPI_0_I2C_0 395
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@ -514,11 +521,11 @@
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#define IMX_SC_R_SECO_MU_3 504
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#define IMX_SC_R_SECO_MU_4 505
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#define IMX_SC_R_HDMI_RX_PWM_0 506
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#define IMX_SC_R_A35 507
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#define IMX_SC_R_A35_0 508
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#define IMX_SC_R_A35_1 509
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#define IMX_SC_R_A35_2 510
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#define IMX_SC_R_A35_3 511
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#define IMX_SC_R_AP_2 507
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#define IMX_SC_R_AP_2_0 508
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#define IMX_SC_R_AP_2_1 509
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#define IMX_SC_R_AP_2_2 510
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#define IMX_SC_R_AP_2_3 511
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#define IMX_SC_R_DSP 512
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#define IMX_SC_R_DSP_RAM 513
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#define IMX_SC_R_CAAM_JR1_OUT 514
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#define IMX_SC_R_BOARD_R5 529
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#define IMX_SC_R_BOARD_R6 530
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#define IMX_SC_R_BOARD_R7 531
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#define IMX_SC_R_MJPEG_DEC_MP 532
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#define IMX_SC_R_MJPEG_ENC_MP 533
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#define IMX_SC_R_MJPEG_0_DEC_MP 532
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#define IMX_SC_R_MJPEG_0_ENC_MP 533
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#define IMX_SC_R_VPU_TS_0 534
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#define IMX_SC_R_VPU_MU_0 535
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#define IMX_SC_R_VPU_MU_1 536
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@ -572,6 +579,105 @@
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#define IMX_SC_PM_CLK_PLL 4 /* PLL */
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#define IMX_SC_PM_CLK_BYPASS 4 /* Bypass clock */
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/*
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* Compatibility defines for sc_rsrc_t
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*/
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#define IMX_SC_R_A35 IMX_SC_R_AP_2
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#define IMX_SC_R_A35_0 IMX_SC_R_AP_2_0
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#define IMX_SC_R_A35_1 IMX_SC_R_AP_2_1
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#define IMX_SC_R_A35_2 IMX_SC_R_AP_2_2
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#define IMX_SC_R_A35_3 IMX_SC_R_AP_2_3
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#define IMX_SC_R_A53 IMX_SC_R_AP_0
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#define IMX_SC_R_A53_0 IMX_SC_R_AP_0_0
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#define IMX_SC_R_A53_1 IMX_SC_R_AP_0_1
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#define IMX_SC_R_A53_2 IMX_SC_R_AP_0_2
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#define IMX_SC_R_A53_3 IMX_SC_R_AP_0_3
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#define IMX_SC_R_A72 IMX_SC_R_AP_1
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#define IMX_SC_R_A72_0 IMX_SC_R_AP_1_0
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#define IMX_SC_R_A72_1 IMX_SC_R_AP_1_1
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#define IMX_SC_R_A72_2 IMX_SC_R_AP_1_2
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#define IMX_SC_R_A72_3 IMX_SC_R_AP_1_3
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#define IMX_SC_R_GIC IMX_SC_R_GIC_0
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#define IMX_SC_R_HSIO_GPIO IMX_SC_R_HSIO_GPIO_0
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#define IMX_SC_R_IEE IMX_SC_R_IEE_0
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#define IMX_SC_R_IEE_R0 IMX_SC_R_IEE_0_R0
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#define IMX_SC_R_IEE_R1 IMX_SC_R_IEE_0_R1
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#define IMX_SC_R_IEE_R2 IMX_SC_R_IEE_0_R2
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#define IMX_SC_R_IEE_R3 IMX_SC_R_IEE_0_R3
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#define IMX_SC_R_IEE_R4 IMX_SC_R_IEE_0_R4
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#define IMX_SC_R_IEE_R5 IMX_SC_R_IEE_0_R5
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#define IMX_SC_R_IEE_R6 IMX_SC_R_IEE_0_R6
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#define IMX_SC_R_IEE_R7 IMX_SC_R_IEE_0_R7
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#define IMX_SC_R_IRQSTR_M4_0 IMX_SC_R_IRQSTR_MCU_0
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#define IMX_SC_R_IRQSTR_M4_1 IMX_SC_R_IRQSTR_MCU_1
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#define IMX_SC_R_IRQSTR_SCU2 IMX_SC_R_IRQSTR_AP_0
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#define IMX_SC_R_ISI_CH0 IMX_SC_R_ISI_0_CH0
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#define IMX_SC_R_ISI_CH1 IMX_SC_R_ISI_0_CH1
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#define IMX_SC_R_ISI_CH2 IMX_SC_R_ISI_0_CH2
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#define IMX_SC_R_ISI_CH3 IMX_SC_R_ISI_0_CH3
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#define IMX_SC_R_ISI_CH4 IMX_SC_R_ISI_0_CH4
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#define IMX_SC_R_ISI_CH5 IMX_SC_R_ISI_0_CH5
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#define IMX_SC_R_ISI_CH6 IMX_SC_R_ISI_0_CH6
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#define IMX_SC_R_ISI_CH7 IMX_SC_R_ISI_0_CH7
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#define IMX_SC_R_M4_0_I2C IMX_SC_R_MCU_0_I2C
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#define IMX_SC_R_M4_0_INTMUX IMX_SC_R_MCU_0_INTMUX
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#define IMX_SC_R_M4_0_MU_0A0 IMX_SC_R_MCU_0_MU_0A0
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#define IMX_SC_R_M4_0_MU_0A1 IMX_SC_R_MCU_0_MU_0A1
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#define IMX_SC_R_M4_0_MU_0A2 IMX_SC_R_MCU_0_MU_0A2
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#define IMX_SC_R_M4_0_MU_0A3 IMX_SC_R_MCU_0_MU_0A3
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#define IMX_SC_R_M4_0_MU_0B IMX_SC_R_MCU_0_MU_0B
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#define IMX_SC_R_M4_0_MU_1A IMX_SC_R_MCU_0_MU_1A
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#define IMX_SC_R_M4_0_PID0 IMX_SC_R_MCU_0_PID0
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#define IMX_SC_R_M4_0_PID1 IMX_SC_R_MCU_0_PID1
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#define IMX_SC_R_M4_0_PID2 IMX_SC_R_MCU_0_PID2
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#define IMX_SC_R_M4_0_PID3 IMX_SC_R_MCU_0_PID3
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#define IMX_SC_R_M4_0_PID4 IMX_SC_R_MCU_0_PID4
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#define IMX_SC_R_M4_0_PIT IMX_SC_R_MCU_0_PIT
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#define IMX_SC_R_M4_0_RGPIO IMX_SC_R_MCU_0_RGPIO
|
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#define IMX_SC_R_M4_0_SEMA42 IMX_SC_R_MCU_0_SEMA42
|
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#define IMX_SC_R_M4_0_TPM IMX_SC_R_MCU_0_TPM
|
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#define IMX_SC_R_M4_0_UART IMX_SC_R_MCU_0_UART
|
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#define IMX_SC_R_M4_1_I2C IMX_SC_R_MCU_1_I2C
|
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#define IMX_SC_R_M4_1_INTMUX IMX_SC_R_MCU_1_INTMUX
|
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#define IMX_SC_R_M4_1_MU_0A0 IMX_SC_R_MCU_1_MU_0A0
|
||||
#define IMX_SC_R_M4_1_MU_0A1 IMX_SC_R_MCU_1_MU_0A1
|
||||
#define IMX_SC_R_M4_1_MU_0A2 IMX_SC_R_MCU_1_MU_0A2
|
||||
#define IMX_SC_R_M4_1_MU_0A3 IMX_SC_R_MCU_1_MU_0A3
|
||||
#define IMX_SC_R_M4_1_MU_0B IMX_SC_R_MCU_1_MU_0B
|
||||
#define IMX_SC_R_M4_1_MU_1A IMX_SC_R_MCU_1_MU_1A
|
||||
#define IMX_SC_R_M4_1_PID0 IMX_SC_R_MCU_1_PID0
|
||||
#define IMX_SC_R_M4_1_PID1 IMX_SC_R_MCU_1_PID1
|
||||
#define IMX_SC_R_M4_1_PID2 IMX_SC_R_MCU_1_PID2
|
||||
#define IMX_SC_R_M4_1_PID3 IMX_SC_R_MCU_1_PID3
|
||||
#define IMX_SC_R_M4_1_PID4 IMX_SC_R_MCU_1_PID4
|
||||
#define IMX_SC_R_M4_1_PIT IMX_SC_R_MCU_1_PIT
|
||||
#define IMX_SC_R_M4_1_RGPIO IMX_SC_R_MCU_1_RGPIO
|
||||
#define IMX_SC_R_M4_1_SEMA42 IMX_SC_R_MCU_1_SEMA42
|
||||
#define IMX_SC_R_M4_1_TPM IMX_SC_R_MCU_1_TPM
|
||||
#define IMX_SC_R_M4_1_UART IMX_SC_R_MCU_1_UART
|
||||
#define IMX_SC_R_MJPEG_DEC_MP IMX_SC_R_MJPEG_0_DEC_MP
|
||||
#define IMX_SC_R_MJPEG_DEC_S0 IMX_SC_R_MJPEG_0_DEC_S0
|
||||
#define IMX_SC_R_MJPEG_DEC_S1 IMX_SC_R_MJPEG_0_DEC_S1
|
||||
#define IMX_SC_R_MJPEG_DEC_S2 IMX_SC_R_MJPEG_0_DEC_S2
|
||||
#define IMX_SC_R_MJPEG_DEC_S3 IMX_SC_R_MJPEG_0_DEC_S3
|
||||
#define IMX_SC_R_MJPEG_ENC_MP IMX_SC_R_MJPEG_0_ENC_MP
|
||||
#define IMX_SC_R_MJPEG_ENC_S0 IMX_SC_R_MJPEG_0_ENC_S0
|
||||
#define IMX_SC_R_MJPEG_ENC_S1 IMX_SC_R_MJPEG_0_ENC_S1
|
||||
#define IMX_SC_R_MJPEG_ENC_S2 IMX_SC_R_MJPEG_0_ENC_S2
|
||||
#define IMX_SC_R_MJPEG_ENC_S3 IMX_SC_R_MJPEG_0_ENC_S3
|
||||
#define IMX_SC_R_PERF IMX_SC_R_PERF_0
|
||||
#define IMX_SC_R_SMMU IMX_SC_R_SMMU_0
|
||||
#define IMX_SC_R_VPU_UART IMX_SC_R_ENET_0_A2
|
||||
#define IMX_SC_R_VPUCORE IMX_SC_R_ENET_1_A0
|
||||
#define IMX_SC_R_VPUCORE_0 IMX_SC_R_ENET_1_A1
|
||||
#define IMX_SC_R_VPUCORE_1 IMX_SC_R_ENET_1_A2
|
||||
#define IMX_SC_R_VPUCORE_2 IMX_SC_R_ENET_1_A3
|
||||
#define IMX_SC_R_VPUCORE_3 IMX_SC_R_ENET_1_A4
|
||||
#define IMX_SC_R_UNUSED1 IMX_SC_R_V2X_PID0
|
||||
#define IMX_SC_R_UNUSED2 IMX_SC_R_V2X_PID1
|
||||
#define IMX_SC_R_UNUSED3 IMX_SC_R_V2X_PID2
|
||||
#define IMX_SC_R_UNUSED4 IMX_SC_R_V2X_PID3
|
||||
|
||||
/*
|
||||
* Defines for SC CONTROL
|
||||
*/
|
||||
@ -637,6 +743,10 @@
|
||||
#define IMX_SC_C_INTF_SEL 59
|
||||
#define IMX_SC_C_RXC_DLY 60
|
||||
#define IMX_SC_C_TIMER_SEL 61
|
||||
#define IMX_SC_C_LAST 62
|
||||
#define IMX_SC_C_MISC0 62
|
||||
#define IMX_SC_C_MISC1 63
|
||||
#define IMX_SC_C_MISC2 64
|
||||
#define IMX_SC_C_MISC3 65
|
||||
#define IMX_SC_C_LAST 66
|
||||
|
||||
#endif /* __DT_BINDINGS_RSCRC_IMX_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user