habanalabs: Add busy engines bitmask to HW idle IOCTL
The information which is currently provided as a response to the "HL_INFO_HW_IDLE" IOCTL is merely a general boolean value. This patch extends it and provides also a bitmask that indicates which of the device engines are busy. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@@ -45,6 +45,30 @@ enum goya_queue_id {
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GOYA_QUEUE_ID_SIZE
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};
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/*
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* Engine Numbering
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*
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* Used in the "busy_engines_mask" field in `struct hl_info_hw_idle'
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*/
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enum goya_engine_id {
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GOYA_ENGINE_ID_DMA_0 = 0,
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GOYA_ENGINE_ID_DMA_1,
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GOYA_ENGINE_ID_DMA_2,
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GOYA_ENGINE_ID_DMA_3,
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GOYA_ENGINE_ID_DMA_4,
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GOYA_ENGINE_ID_MME_0,
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GOYA_ENGINE_ID_TPC_0,
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GOYA_ENGINE_ID_TPC_1,
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GOYA_ENGINE_ID_TPC_2,
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GOYA_ENGINE_ID_TPC_3,
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GOYA_ENGINE_ID_TPC_4,
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GOYA_ENGINE_ID_TPC_5,
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GOYA_ENGINE_ID_TPC_6,
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GOYA_ENGINE_ID_TPC_7,
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GOYA_ENGINE_ID_SIZE
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};
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enum hl_device_status {
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HL_DEVICE_STATUS_OPERATIONAL,
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HL_DEVICE_STATUS_IN_RESET,
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@@ -86,7 +110,11 @@ struct hl_info_dram_usage {
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struct hl_info_hw_idle {
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__u32 is_idle;
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__u32 pad;
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/*
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* Bitmask of busy engines.
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* Bits definition is according to `enum <chip>_enging_id'.
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*/
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__u32 busy_engines_mask;
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};
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struct hl_info_device_status {
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