Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
This commit is contained in:
Linus Torvalds
@@ -5,6 +5,7 @@
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/regulator/dlg,da9211-regulator.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt8173.dtsi"
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@@ -294,7 +295,8 @@
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regulator-max-microamp = <4400000>;
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regulator-ramp-delay = <10000>;
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regulator-always-on;
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regulator-allowed-modes = <0 1>;
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regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
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DA9211_BUCK_MODE_AUTO>;
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};
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da9211_vgpu_reg: BUCKB {
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@@ -431,12 +433,11 @@
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nor_gpio1_pins>;
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bus-width = <8>;
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max-frequency = <50000000>;
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non-removable;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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};
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};
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@@ -25,6 +25,17 @@
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chosen {
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stdout-path = "serial0:921600n8";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp_mem_region {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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};
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};
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&auxadc {
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@@ -90,6 +90,18 @@
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regulator-max-microvolt = <3300000>;
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp_mem_region {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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};
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max98357a: codec0 {
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compatible = "maxim,max98357a";
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sdmode-gpios = <&pio 175 0>;
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@@ -524,6 +536,13 @@
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};
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};
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scp_pins: scp {
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pins_scp_uart {
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pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
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<PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
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};
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};
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spi0_pins: spi0 {
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pins_spi{
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pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
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@@ -651,6 +670,17 @@
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};
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};
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&scp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&scp_pins>;
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cros_ec {
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compatible = "google,cros-ec-rpmsg";
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mtk,rpmsg-name = "cros-ec-rpmsg";
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};
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};
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&soc_data {
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status = "okay";
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};
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@@ -317,8 +317,7 @@
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};
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watchdog: watchdog@10007000 {
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compatible = "mediatek,mt8183-wdt",
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"mediatek,mt6589-wdt";
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compatible = "mediatek,mt8183-wdt";
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reg = <0 0x10007000 0 0x100>;
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#reset-cells = <1>;
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};
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@@ -339,6 +338,18 @@
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clock-names = "spi", "wrap";
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};
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scp: scp@10500000 {
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compatible = "mediatek,mt8183-scp";
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reg = <0 0x10500000 0 0x80000>,
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<0 0x105c0000 0 0x19080>;
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reg-names = "sram", "cfg";
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&infracfg CLK_INFRA_SCPSYS>;
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clock-names = "main";
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memory-region = <&scp_mem_reserved>;
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status = "disabled";
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};
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systimer: timer@10017000 {
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compatible = "mediatek,mt8183-timer",
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"mediatek,mt6765-timer";
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@@ -56,7 +56,7 @@
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tca6416: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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rst-gpio = <&pio 65 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&pio 65 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&tca6416_pins>;
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