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riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE

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Fix a couple of spelling issues plus some minor details on the grammar.

Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
Link: https://lore.kernel.org/r/20250501130309.14803-1-mikisabate@gmail.com
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
This commit is contained in:
Miquel Sabaté Solà
2025-05-01 15:03:09 +02:00
committed by Palmer Dabbelt
parent 9811c864f5
commit c39d53750f
1 changed files with 4 additions and 4 deletions
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arch/riscv/Kconfig
+4 -4
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@@ -669,12 +669,12 @@ config RISCV_ISA_V_PREEMPTIVE
default y default y
help help
Usually, in-kernel SIMD routines are run with preemption disabled. Usually, in-kernel SIMD routines are run with preemption disabled.
Functions which envoke long running SIMD thus must yield core's Functions which invoke long running SIMD thus must yield the core's
vector unit to prevent blocking other tasks for too long. vector unit to prevent blocking other tasks for too long.
This config allows kernel to run SIMD without explicitly disable This config allows the kernel to run SIMD without explicitly disabling
preemption. Enabling this config will result in higher memory preemption. Enabling this config will result in higher memory consumption
consumption due to the allocation of per-task's kernel Vector context. due to the allocation of per-task's kernel Vector context.
config RISCV_ISA_ZAWRS config RISCV_ISA_ZAWRS
bool "Zawrs extension support for more efficient busy waiting" bool "Zawrs extension support for more efficient busy waiting"