net: ll_temac: Add support for non-native register endianness
Replace the powerpc specific MMIO register access functions with the generic big-endian mmio access functions, and add support for little-endian access depending on configuration. Big-endian access is maintained as the default, but little-endian can be configured in device-tree binding or in platform data. The temac_ior()/temac_iow() functions are replaced with macro wrappers to avoid modifying existing code more than necessary. Signed-off-by: Esben Haabendal <esben@geanix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
d84aec4215
commit
a3246dc41a
@@ -347,8 +347,10 @@ struct temac_local {
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#ifdef CONFIG_PPC_DCR
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#ifdef CONFIG_PPC_DCR
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dcr_host_t sdma_dcrs;
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dcr_host_t sdma_dcrs;
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#endif
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#endif
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u32 (*dma_in)(struct temac_local *, int);
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u32 (*temac_ior)(struct temac_local *lp, int offset);
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void (*dma_out)(struct temac_local *, int, u32);
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void (*temac_iow)(struct temac_local *lp, int offset, u32 value);
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u32 (*dma_in)(struct temac_local *lp, int reg);
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void (*dma_out)(struct temac_local *lp, int reg, u32 value);
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int tx_irq;
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int tx_irq;
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int rx_irq;
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int rx_irq;
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@@ -372,9 +374,11 @@ struct temac_local {
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int rx_bd_ci;
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int rx_bd_ci;
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};
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};
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/* Wrappers for temac_ior()/temac_iow() function pointers above */
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#define temac_ior(lp, o) ((lp)->temac_ior(lp, o))
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#define temac_iow(lp, o, v) ((lp)->temac_iow(lp, o, v))
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/* xilinx_temac.c */
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/* xilinx_temac.c */
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u32 temac_ior(struct temac_local *lp, int offset);
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void temac_iow(struct temac_local *lp, int offset, u32 value);
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int temac_indirect_busywait(struct temac_local *lp);
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int temac_indirect_busywait(struct temac_local *lp);
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u32 temac_indirect_in32(struct temac_local *lp, int reg);
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u32 temac_indirect_in32(struct temac_local *lp, int reg);
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void temac_indirect_out32(struct temac_local *lp, int reg, u32 value);
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void temac_indirect_out32(struct temac_local *lp, int reg, u32 value);
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@@ -63,14 +63,24 @@
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* Low level register access functions
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* Low level register access functions
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*/
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*/
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u32 temac_ior(struct temac_local *lp, int offset)
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u32 _temac_ior_be(struct temac_local *lp, int offset)
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{
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{
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return in_be32(lp->regs + offset);
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return ioread32be(lp->regs + offset);
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}
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}
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void temac_iow(struct temac_local *lp, int offset, u32 value)
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void _temac_iow_be(struct temac_local *lp, int offset, u32 value)
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{
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{
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out_be32(lp->regs + offset, value);
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return iowrite32be(value, lp->regs + offset);
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}
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u32 _temac_ior_le(struct temac_local *lp, int offset)
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{
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return ioread32(lp->regs + offset);
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}
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void _temac_iow_le(struct temac_local *lp, int offset, u32 value)
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{
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return iowrite32(value, lp->regs + offset);
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}
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}
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int temac_indirect_busywait(struct temac_local *lp)
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int temac_indirect_busywait(struct temac_local *lp)
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@@ -121,23 +131,35 @@ void temac_indirect_out32(struct temac_local *lp, int reg, u32 value)
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}
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}
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/**
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/**
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* temac_dma_in32 - Memory mapped DMA read, this function expects a
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* temac_dma_in32_* - Memory mapped DMA read, these function expects a
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* register input that is based on DCR word addresses which
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* register input that is based on DCR word addresses which are then
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* are then converted to memory mapped byte addresses
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* converted to memory mapped byte addresses. To be assigned to
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* lp->dma_in32.
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*/
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*/
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static u32 temac_dma_in32(struct temac_local *lp, int reg)
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static u32 temac_dma_in32_be(struct temac_local *lp, int reg)
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{
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{
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return in_be32(lp->sdma_regs + (reg << 2));
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return ioread32be(lp->sdma_regs + (reg << 2));
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}
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static u32 temac_dma_in32_le(struct temac_local *lp, int reg)
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{
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return ioread32(lp->sdma_regs + (reg << 2));
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}
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}
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/**
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/**
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* temac_dma_out32 - Memory mapped DMA read, this function expects a
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* temac_dma_out32_* - Memory mapped DMA read, these function expects
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* register input that is based on DCR word addresses which
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* a register input that is based on DCR word addresses which are then
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* are then converted to memory mapped byte addresses
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* converted to memory mapped byte addresses. To be assigned to
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* lp->dma_out32.
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*/
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*/
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static void temac_dma_out32(struct temac_local *lp, int reg, u32 value)
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static void temac_dma_out32_be(struct temac_local *lp, int reg, u32 value)
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{
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{
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out_be32(lp->sdma_regs + (reg << 2), value);
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iowrite32be(value, lp->sdma_regs + (reg << 2));
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}
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static void temac_dma_out32_le(struct temac_local *lp, int reg, u32 value)
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{
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iowrite32(value, lp->sdma_regs + (reg << 2));
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}
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}
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/* DMA register access functions can be DCR based or memory mapped.
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/* DMA register access functions can be DCR based or memory mapped.
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@@ -1024,6 +1046,7 @@ static int temac_probe(struct platform_device *pdev)
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struct resource *res;
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struct resource *res;
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const void *addr;
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const void *addr;
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__be32 *p;
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__be32 *p;
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bool little_endian;
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int rc = 0;
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int rc = 0;
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/* Init network device structure */
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/* Init network device structure */
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@@ -1068,6 +1091,24 @@ static int temac_probe(struct platform_device *pdev)
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return PTR_ERR(lp->regs);
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return PTR_ERR(lp->regs);
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}
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}
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/* Select register access functions with the specified
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* endianness mode. Default for OF devices is big-endian.
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*/
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little_endian = false;
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if (temac_np) {
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if (of_get_property(temac_np, "little-endian", NULL))
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little_endian = true;
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} else if (pdata) {
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little_endian = pdata->reg_little_endian;
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}
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if (little_endian) {
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lp->temac_ior = _temac_ior_le;
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lp->temac_iow = _temac_iow_le;
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} else {
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lp->temac_ior = _temac_ior_be;
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lp->temac_iow = _temac_iow_be;
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}
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/* Setup checksum offload, but default to off if not specified */
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/* Setup checksum offload, but default to off if not specified */
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lp->temac_features = 0;
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lp->temac_features = 0;
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if (temac_np) {
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if (temac_np) {
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@@ -1111,8 +1152,13 @@ static int temac_probe(struct platform_device *pdev)
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of_node_put(dma_np);
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of_node_put(dma_np);
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return PTR_ERR(lp->sdma_regs);
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return PTR_ERR(lp->sdma_regs);
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}
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}
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lp->dma_in = temac_dma_in32;
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if (of_get_property(dma_np, "little-endian", NULL)) {
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lp->dma_out = temac_dma_out32;
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lp->dma_in = temac_dma_in32_le;
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lp->dma_out = temac_dma_out32_le;
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} else {
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lp->dma_in = temac_dma_in32_be;
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lp->dma_out = temac_dma_out32_be;
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}
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dev_dbg(&pdev->dev, "MEM base: %p\n", lp->sdma_regs);
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dev_dbg(&pdev->dev, "MEM base: %p\n", lp->sdma_regs);
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}
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}
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@@ -1132,8 +1178,13 @@ static int temac_probe(struct platform_device *pdev)
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"could not map DMA registers\n");
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"could not map DMA registers\n");
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return PTR_ERR(lp->sdma_regs);
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return PTR_ERR(lp->sdma_regs);
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}
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}
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lp->dma_in = temac_dma_in32;
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if (pdata->dma_little_endian) {
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lp->dma_out = temac_dma_out32;
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lp->dma_in = temac_dma_in32_le;
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lp->dma_out = temac_dma_out32_le;
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} else {
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lp->dma_in = temac_dma_in32_be;
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lp->dma_out = temac_dma_out32_be;
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}
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/* Get DMA RX and TX interrupts */
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/* Get DMA RX and TX interrupts */
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lp->rx_irq = platform_get_irq(pdev, 0);
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lp->rx_irq = platform_get_irq(pdev, 0);
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@@ -14,6 +14,8 @@ struct ll_temac_platform_data {
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unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
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unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
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int phy_addr; /* Address of the PHY to connect to */
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int phy_addr; /* Address of the PHY to connect to */
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phy_interface_t phy_interface; /* PHY interface mode */
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phy_interface_t phy_interface; /* PHY interface mode */
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bool reg_little_endian; /* Little endian TEMAC register access */
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bool dma_little_endian; /* Little endian DMA register access */
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};
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};
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#endif /* __LINUX_XILINX_LL_TEMAC_H */
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#endif /* __LINUX_XILINX_LL_TEMAC_H */
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