Merge branch 'linus' into perf/core
Merge reason: Pick up the latest perf fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@@ -50,7 +50,7 @@
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#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
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#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
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#define AR7_RESET_PEREPHERIAL 0x0
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#define AR7_RESET_PERIPHERAL 0x0
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#define AR7_RESET_SOFTWARE 0x4
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#define AR7_RESET_STATUS 0x8
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@@ -128,7 +128,7 @@ static inline int ar7_has_high_cpmac(void)
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static inline void ar7_device_enable(u32 bit)
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{
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void *reset_reg =
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(void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
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(void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL);
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writel(readl(reset_reg) | (1 << bit), reset_reg);
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msleep(20);
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}
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@@ -136,7 +136,7 @@ static inline void ar7_device_enable(u32 bit)
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static inline void ar7_device_disable(u32 bit)
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{
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void *reset_reg =
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(void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
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(void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL);
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writel(readl(reset_reg) & ~(1 << bit), reset_reg);
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msleep(20);
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}
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@@ -24,7 +24,7 @@
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#define AR7_GPIO_MAX 32
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#define NR_BUILTIN_GPIO AR7_GPIO_MAX
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#define gpio_to_irq(gpio) NULL
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#define gpio_to_irq(gpio) -1
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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@@ -188,7 +188,8 @@ extern unsigned long get_au1x00_uart_baud_base(void);
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extern unsigned long au1xxx_calc_clock(void);
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/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
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void au1xxx_save_and_sleep(void);
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void alchemy_sleep_au1000(void);
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void alchemy_sleep_au1550(void);
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void au_sleep(void);
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@@ -0,0 +1,36 @@
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/*
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* Copyright (C) 2005, Broadcom Corporation
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* Copyright (C) 2006, Felix Fietkau <nbd@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __NVRAM_H
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#define __NVRAM_H
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#include <linux/types.h>
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struct nvram_header {
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u32 magic;
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u32 len;
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u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
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u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
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u32 config_ncdl; /* ncdl values for memc */
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};
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#define NVRAM_HEADER 0x48534C46 /* 'FLSH' */
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#define NVRAM_VERSION 1
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#define NVRAM_HEADER_SIZE 20
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#define NVRAM_SPACE 0x8000
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#define FLASH_MIN 0x00020000 /* Minimum flash size */
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#define NVRAM_MAX_VALUE_LEN 255
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#define NVRAM_MAX_PARAM_LEN 64
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extern int nvram_getenv(char *name, char *val, size_t val_len);
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#endif
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@@ -3,7 +3,7 @@
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#include <bcm63xx_gpio.h>
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#define gpio_to_irq(gpio) NULL
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#define gpio_to_irq(gpio) -1
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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