[MIPS] Complete fixes after removal of pt_regs argument to int handlers.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2006-10-07 19:44:33 +01:00
parent 31aa36658a
commit 937a801576
79 changed files with 559 additions and 624 deletions
+2 -1
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@@ -93,11 +93,12 @@ void output_thread_info_defines(void)
offset("#define TI_TASK ", struct thread_info, task);
offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain);
offset("#define TI_FLAGS ", struct thread_info, flags);
offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
offset("#define TI_CPU ", struct thread_info, cpu);
offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
offset("#define TI_REGS ", struct thread_info, regs);
constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
constant("#define _THREAD_SIZE ", THREAD_SIZE);
constant("#define _THREAD_MASK ", THREAD_MASK);
-1
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@@ -79,7 +79,6 @@ FEXPORT(syscall_exit)
FEXPORT(restore_all) # restore full frame
#ifdef CONFIG_MIPS_MT_SMTC
/* Detect and execute deferred IPI "interrupts" */
move a0,sp
jal deferred_smtc_ipi
/* Re-arm any temporarily masked interrupts not explicitly "acked" */
mfc0 v0, CP0_TCSTATUS
+10 -5
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@@ -131,9 +131,11 @@ NESTED(handle_int, PT_SIZE, sp)
CLI
TRACE_IRQS_OFF
PTR_LA ra, ret_from_irq
move a0, sp
j plat_irq_dispatch
LONG_L s0, TI_REGS($28)
LONG_S sp, TI_REGS($28)
jal plat_irq_dispatch
LONG_S s0, TI_REGS($28)
j ret_from_irq
END(handle_int)
__INIT
@@ -219,9 +221,12 @@ NESTED(except_vec_vi_handler, 0, sp)
#endif /* CONFIG_MIPS_MT_SMTC */
CLI
TRACE_IRQS_OFF
move a0, sp
LONG_L s0, TI_REGS($28)
LONG_S sp, TI_REGS($28)
jalr v0
LONG_S s0, TI_REGS($28)
PTR_LA ra, ret_from_irq
jr v0
END(except_vec_vi_handler)
/*
+2 -2
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@@ -115,14 +115,14 @@ static void end_msc_irq(unsigned int irq)
/*
* Interrupt handler for interrupts coming from SOC-it.
*/
void ll_msc_irq(struct pt_regs *regs)
void ll_msc_irq(void)
{
unsigned int irq;
/* read the interrupt vector register */
MSCIC_READ(MSC01_IC_VEC, irq);
if (irq < 64)
do_IRQ(irq + irq_base, regs);
do_IRQ(irq + irq_base);
else {
/* Ignore spurious interrupt */
}
+3 -3
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@@ -113,7 +113,7 @@ static void end_mv64340_irq(unsigned int irq)
* Interrupt handler for interrupts coming from the Marvell chip.
* It could be built in ethernet ports etc...
*/
void ll_mv64340_irq(struct pt_regs *regs)
void ll_mv64340_irq(void)
{
unsigned int irq_src_low, irq_src_high;
unsigned int irq_mask_low, irq_mask_high;
@@ -129,9 +129,9 @@ void ll_mv64340_irq(struct pt_regs *regs)
irq_src_high &= irq_mask_high;
if (irq_src_low)
do_IRQ(ls1bit32(irq_src_low) + irq_base, regs);
do_IRQ(ls1bit32(irq_src_low) + irq_base);
else
do_IRQ(ls1bit32(irq_src_high) + irq_base + 32, regs);
do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
}
#define shutdown_mv64340_irq disable_mv64340_irq
+2 -4
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@@ -53,9 +53,8 @@ unsigned long irq_hwmask[NR_IRQS];
* SMP cross-CPU interrupts have their own specific
* handlers).
*/
asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs)
asmlinkage unsigned int do_IRQ(unsigned int irq)
{
struct pt_regs *old_regs = set_irq_regs(regs);
irq_enter();
__DO_IRQ_SMTC_HOOK();
@@ -63,7 +62,6 @@ asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs)
irq_exit();
set_irq_regs(old_regs);
return 1;
}
@@ -112,7 +110,7 @@ skip:
return 0;
}
asmlinkage void spurious_interrupt(struct pt_regs *regs)
asmlinkage void spurious_interrupt(void)
{
atomic_inc(&irq_err_count);
}
+3 -3
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@@ -61,16 +61,16 @@ static int sp_stopping = 0;
extern void *vpe_get_shared(int index);
static void rtlx_dispatch(struct pt_regs *regs)
static void rtlx_dispatch(void)
{
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs);
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ);
}
/* Interrupt handler may be called before rtlx_init has otherwise had
a chance to run.
*/
static irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
{
int i;
+8 -8
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@@ -106,22 +106,22 @@ void __init sanitize_tlb_entries(void)
clear_c0_mvpcontrol(MVPCONTROL_VPC);
}
static void ipi_resched_dispatch (struct pt_regs *regs)
static void ipi_resched_dispatch(void)
{
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ, regs);
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
}
static void ipi_call_dispatch (struct pt_regs *regs)
static void ipi_call_dispatch(void)
{
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ, regs);
do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ);
}
irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
{
return IRQ_HANDLED;
}
irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
{
smp_call_function_interrupt();
@@ -250,8 +250,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
{
/* set up ipi interrupts */
if (cpu_has_vint) {
set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
}
cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
+13 -13
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@@ -82,7 +82,7 @@ struct smtc_ipi_q freeIPIq;
/* Forward declarations */
void ipi_decode(struct pt_regs *, struct smtc_ipi *);
void ipi_decode(struct smtc_ipi *);
void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
void setup_cross_vpe_interrupts(void);
void init_smtc_stats(void);
@@ -820,19 +820,19 @@ void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
write_tc_c0_tcrestart(__smtc_ipi_vector);
}
void ipi_resched_interrupt(struct pt_regs *regs)
static void ipi_resched_interrupt(void)
{
/* Return from interrupt should be enough to cause scheduler check */
}
void ipi_call_interrupt(struct pt_regs *regs)
static void ipi_call_interrupt(void)
{
/* Invoke generic function invocation code in smp.c */
smp_call_function_interrupt();
}
void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
void ipi_decode(struct smtc_ipi *pipi)
{
void *arg_copy = pipi->arg;
int type_copy = pipi->type;
@@ -846,15 +846,15 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
#ifdef SMTC_IDLE_HOOK_DEBUG
clock_hang_reported[dest_copy] = 0;
#endif /* SMTC_IDLE_HOOK_DEBUG */
local_timer_interrupt(0, NULL, regs);
local_timer_interrupt(0, NULL);
break;
case LINUX_SMP_IPI:
switch ((int)arg_copy) {
case SMP_RESCHEDULE_YOURSELF:
ipi_resched_interrupt(regs);
ipi_resched_interrupt();
break;
case SMP_CALL_FUNCTION:
ipi_call_interrupt(regs);
ipi_call_interrupt();
break;
default:
printk("Impossible SMTC IPI Argument 0x%x\n",
@@ -868,7 +868,7 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
}
}
void deferred_smtc_ipi(struct pt_regs *regs)
void deferred_smtc_ipi(void)
{
struct smtc_ipi *pipi;
unsigned long flags;
@@ -883,7 +883,7 @@ void deferred_smtc_ipi(struct pt_regs *regs)
while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {
/* ipi_decode() should be called with interrupts off */
local_irq_save(flags);
ipi_decode(regs, pipi);
ipi_decode(pipi);
local_irq_restore(flags);
}
}
@@ -917,7 +917,7 @@ void smtc_timer_broadcast(int vpe)
static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ;
static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
static irqreturn_t ipi_interrupt(int irq, void *dev_idm)
{
int my_vpe = cpu_data[smp_processor_id()].vpe_id;
int my_tc = cpu_data[smp_processor_id()].tc_id;
@@ -978,7 +978,7 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
* with interrupts off
*/
local_irq_save(flags);
ipi_decode(regs, pipi);
ipi_decode(pipi);
local_irq_restore(flags);
}
}
@@ -987,9 +987,9 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
return IRQ_HANDLED;
}
static void ipi_irq_dispatch(struct pt_regs *regs)
static void ipi_irq_dispatch(void)
{
do_IRQ(cpu_ipi_irq, regs);
do_IRQ(cpu_ipi_irq);
}
static struct irqaction irq_ipi;
+3 -8
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@@ -324,8 +324,7 @@ static long last_rtc_update;
*/
void local_timer_interrupt(int irq, void *dev_id)
{
if (current->pid)
profile_tick(CPU_PROFILING);
profile_tick(CPU_PROFILING);
update_process_times(user_mode(get_irq_regs()));
}
@@ -434,9 +433,8 @@ int (*perf_irq)(void) = null_perf_irq;
EXPORT_SYMBOL(null_perf_irq);
EXPORT_SYMBOL(perf_irq);
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
asmlinkage void ll_timer_interrupt(int irq)
{
struct pt_regs *old_regs = set_irq_regs(regs);
int r2 = cpu_has_mips_r2;
irq_enter();
@@ -458,12 +456,10 @@ asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
out:
irq_exit();
set_irq_regs(old_regs);
}
asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
asmlinkage void ll_local_timer_interrupt(int irq)
{
struct pt_regs *old_regs = set_irq_regs(regs);
irq_enter();
if (smp_processor_id() != 0)
kstat_this_cpu.irqs[irq]++;
@@ -472,7 +468,6 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
local_timer_interrupt(irq, NULL);
irq_exit();
set_irq_regs(old_regs);
}
/*