spi: rockchip: set higher io driver when sclk higher than 24MHz
Change-Id: I963c92eab7f7bff0b32e2ac262aa79f0667f39ee Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
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@@ -19,6 +19,7 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/devinfo.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/pm_runtime.h>
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@@ -148,6 +149,8 @@
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/* sclk_out: spi master internal logic in rk3x can support 50Mhz */
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#define MAX_SCLK_OUT 50000000
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/* max sclk of driver strength 4mA */
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#define IO_DRIVER_4MA_MAX_SCLK_OUT 24000000
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/*
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* SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
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@@ -209,6 +212,7 @@ struct rockchip_spi {
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struct rockchip_spi_dma_data dma_rx;
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struct rockchip_spi_dma_data dma_tx;
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struct dma_slave_caps dma_caps;
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struct pinctrl_state *high_speed_state;
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};
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static inline void spi_enable_chip(struct rockchip_spi *rs, int enable)
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@@ -553,6 +557,19 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
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div = DIV_ROUND_UP(rs->max_freq, rs->speed);
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div = (div + 1) & 0xfffe;
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/*
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* If speed is larger than IO_DRIVER_4MA_MAX_SCLK_OUT,
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* set higher driver strength.
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*/
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if (rs->high_speed_state) {
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if (rs->speed > IO_DRIVER_4MA_MAX_SCLK_OUT)
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pinctrl_select_state(rs->dev->pins->p,
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rs->high_speed_state);
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else
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pinctrl_select_state(rs->dev->pins->p,
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rs->dev->pins->default_state);
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}
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/* Rx sample delay is expressed in parent clock cycles (max 3) */
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rsd = DIV_ROUND_CLOSEST(rs->rsd_nsecs * (rs->max_freq >> 8),
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1000000000 >> 8);
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@@ -792,6 +809,13 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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master->dma_rx = rs->dma_rx.ch;
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}
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rs->high_speed_state = pinctrl_lookup_state(rs->dev->pins->p,
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"high_speed");
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if (IS_ERR_OR_NULL(rs->high_speed_state)) {
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dev_warn(&pdev->dev, "no high_speed pinctrl state\n");
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rs->high_speed_state = NULL;
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}
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ret = devm_spi_register_master(&pdev->dev, master);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to register master\n");
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