Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
MIPS: Use GCC __builtin_prefetch() to implement prefetch().
MIPS: Octeon: Serial port fixes for OCTEON simulator.
MIPS: Octeon: Get rid of early serial.
MIPS: AR7: prevent race between clock initialization and devices registration
MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
MIPS: MTX-1: Update defconfig
MIPS: BCM47xx: Update defconfig
MIPS: RB532: Update defconfig
MIPS: AR7: Update defconfig
RTC: rtc-cmos: Fix binary mode support
MIPS: Oprofile: Loongson: Cleanup the comments
MIPS: Oprofile: Loongson: Cleanup of the macros
MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
MIPS: Oprofile: Loongson: Remove useless parentheses
MIPS: Oprofile: Loongson: Unify macro for setting events
MIPS: nofpu and nodsp only affect CPU0
MIPS: Clean up tables for bootmem allocation
MIPS: Coding style cleanups of access of FCSR rounding mode bits
MIPS: Loongson 2F: Add gpio/gpioilb support
...
This commit is contained in:
@@ -190,8 +190,6 @@ extern unsigned long au1xxx_calc_clock(void);
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/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
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void au1xxx_save_and_sleep(void);
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void au_sleep(void);
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void save_au1xxx_intctl(void);
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void restore_au1xxx_intctl(void);
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/* SOC Interrupt numbers */
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@@ -835,6 +833,38 @@ enum soc_au1200_ints {
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#define MEM_STNAND_DATA 0x20
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#endif
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/* Interrupt Controller register offsets */
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#define IC_CFG0RD 0x40
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#define IC_CFG0SET 0x40
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#define IC_CFG0CLR 0x44
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#define IC_CFG1RD 0x48
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#define IC_CFG1SET 0x48
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#define IC_CFG1CLR 0x4C
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#define IC_CFG2RD 0x50
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#define IC_CFG2SET 0x50
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#define IC_CFG2CLR 0x54
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#define IC_REQ0INT 0x54
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#define IC_SRCRD 0x58
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#define IC_SRCSET 0x58
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#define IC_SRCCLR 0x5C
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#define IC_REQ1INT 0x5C
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#define IC_ASSIGNRD 0x60
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#define IC_ASSIGNSET 0x60
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#define IC_ASSIGNCLR 0x64
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#define IC_WAKERD 0x68
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#define IC_WAKESET 0x68
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#define IC_WAKECLR 0x6C
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#define IC_MASKRD 0x70
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#define IC_MASKSET 0x70
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#define IC_MASKCLR 0x74
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#define IC_RISINGRD 0x78
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#define IC_RISINGCLR 0x78
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#define IC_FALLINGRD 0x7C
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#define IC_FALLINGCLR 0x7C
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#define IC_TESTBIT 0x80
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/* Interrupt Controller 0 */
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#define IC0_CFG0RD 0xB0400040
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#define IC0_CFG0SET 0xB0400040
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@@ -358,10 +358,6 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr);
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u32 au1xxx_ddma_add_device(dbdev_tab_t *dev);
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extern void au1xxx_ddma_del_device(u32 devid);
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void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
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#ifdef CONFIG_PM
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void au1xxx_dbdma_suspend(void);
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void au1xxx_dbdma_resume(void);
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#endif
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/*
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* Flags for the put_source/put_dest functions.
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@@ -20,7 +20,7 @@ static inline unsigned long bcm63xx_gpio_count(void)
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}
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}
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#define GPIO_DIR_OUT 0x0
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#define GPIO_DIR_IN 0x1
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#define BCM63XX_GPIO_DIR_OUT 0x0
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#define BCM63XX_GPIO_DIR_IN 0x1
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#endif /* !BCM63XX_GPIO_H */
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@@ -52,6 +52,8 @@
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#define cpu_has_tx39_cache 0
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#define cpu_has_userlocal 0
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#define cpu_has_vce 0
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#define cpu_has_veic 0
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#define cpu_has_vint 0
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#define cpu_has_vtag_icache 0
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#define cpu_has_watch 1
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@@ -0,0 +1,35 @@
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/*
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* STLS2F GPIO Support
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*
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* Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
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* Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __STLS2F_GPIO_H
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#define __STLS2F_GPIO_H
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#include <asm-generic/gpio.h>
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extern void gpio_set_value(unsigned gpio, int value);
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extern int gpio_get_value(unsigned gpio);
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extern int gpio_cansleep(unsigned gpio);
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/* The chip can do interrupt
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* but it has not been tested and doc not clear
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*/
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static inline int gpio_to_irq(int gpio)
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{
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return -EINVAL;
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}
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static inline int irq_to_gpio(int gpio)
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{
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return -EINVAL;
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}
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#endif /* __STLS2F_GPIO_H */
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@@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p);
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#ifdef CONFIG_CPU_HAS_PREFETCH
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#define ARCH_HAS_PREFETCH
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#define prefetch(x) __builtin_prefetch((x), 0, 1)
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static inline void prefetch(const void *addr)
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{
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__asm__ __volatile__(
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" .set mips4 \n"
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" pref %0, (%1) \n"
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" .set mips0 \n"
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:
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: "i" (Pref_Load), "r" (addr));
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}
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#define ARCH_HAS_PREFETCHW
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#define prefetchw(x) __builtin_prefetch((x), 1, 1)
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#endif
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