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drm/i915: move lvds_border_bits to pipe_config

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pipe_config is the new dev_priv!

More seriously, this is actually better since a pipe_config can be
thrown away if the modeset compute config stage fails. Whereas any
state stored in dev_prive needs to be painstakingly restored, since
otherwise a dpms off/on will wreak massive havoc. Yes, that even
applies to state only used in ->mode_set callbacks, since we need to
call those even for dpms on when the Haswell power well cleared
everything out.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter
2013-04-25 22:52:16 +02:00
parent f49e38dd23
commit 68fc874289
4 changed files with 3 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/i915/i915_drv.h
-2
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@@ -1019,8 +1019,6 @@ typedef struct drm_i915_private {
/* Kernel Modesetting */ /* Kernel Modesetting */
struct sdvo_device_mapping sdvo_mappings[2]; struct sdvo_device_mapping sdvo_mappings[2];
/* indicate whether the LVDS_BORDER should be enabled or not */
unsigned int lvds_border_bits;
struct drm_crtc *plane_to_crtc_mapping[3]; struct drm_crtc *plane_to_crtc_mapping[3];
struct drm_crtc *pipe_to_crtc_mapping[3]; struct drm_crtc *pipe_to_crtc_mapping[3];
drivers/gpu/drm/i915/intel_drv.h
+1
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@@ -249,6 +249,7 @@ struct intel_crtc_config {
struct { struct {
u32 control; u32 control;
u32 pgm_ratios; u32 pgm_ratios;
u32 lvds_border_bits;
} gmch_pfit; } gmch_pfit;
/* Panel fitter placement and size for Ironlake+ */ /* Panel fitter placement and size for Ironlake+ */
drivers/gpu/drm/i915/intel_lvds.c
+1 -1
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@@ -116,7 +116,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
} }
/* set the corresponsding LVDS_BORDER bit */ /* set the corresponsding LVDS_BORDER bit */
temp |= dev_priv->lvds_border_bits; temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
/* Set the B0-B3 data pairs corresponding to whether we're going to /* Set the B0-B3 data pairs corresponding to whether we're going to
* set the DPLLs for dual-channel mode or not. * set the DPLLs for dual-channel mode or not.
*/ */
drivers/gpu/drm/i915/intel_panel.c
+1 -2
View File
@@ -183,7 +183,6 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
int fitting_mode) int fitting_mode)
{ {
struct drm_device *dev = intel_crtc->base.dev; struct drm_device *dev = intel_crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
struct drm_display_mode *mode, *adjusted_mode; struct drm_display_mode *mode, *adjusted_mode;
@@ -312,7 +311,7 @@ out:
pipe_config->gmch_pfit.control = pfit_control; pipe_config->gmch_pfit.control = pfit_control;
pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
} }
dev_priv->lvds_border_bits = border; pipe_config->gmch_pfit.lvds_border_bits = border;
} }
static int is_backlight_combination_mode(struct drm_device *dev) static int is_backlight_combination_mode(struct drm_device *dev)