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amd64_edac: Improve error injection

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When injecting DRAM ECC errors over the F3xB[8,C] interface, the machine
does this by injecting the error in the next non-cached access. This
takes relatively long time on a normal system so that in order for us to
expedite it, we disable the caches around the injection.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
This commit is contained in:
Borislav Petkov
2012-08-09 18:41:07 +02:00
committed by Borislav Petkov
parent 6e71a870b8
commit 66fed2d464
3 changed files with 41 additions and 10 deletions
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drivers/edac/amd64_edac.c
+5 -5
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@@ -60,8 +60,8 @@ struct scrubrate {
{ 0x00, 0UL}, /* scrubbing off */
};
static int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,
u32 *val, const char *func)
int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,
u32 *val, const char *func)
{
int err = 0;
@@ -1980,11 +1980,11 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)
static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
struct mce *m)
{
u16 ec = EC(m->status);
u8 xec = XEC(m->status, 0x1f);
u8 ecc_type = (m->status >> 45) & 0x3;
u8 xec = XEC(m->status, 0x1f);
u16 ec = EC(m->status);
/* Bail early out if this was an 'observed' error */
/* Bail out early if this was an 'observed' error */
if (PP(ec) == NBSL_PP_OBS)
return;