[MIPS] Fast path for rdhwr emulation for TLS
Add special short path for emulationg RDHWR which is used to support TLS. Add an extra prologue for cpu_has_vtag_icache case. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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committed by
Ralf Baechle
parent
656be92f9a
commit
5b10496b6e
@@ -54,6 +54,8 @@ extern asmlinkage void handle_dbe(void);
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extern asmlinkage void handle_sys(void);
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extern asmlinkage void handle_bp(void);
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extern asmlinkage void handle_ri(void);
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extern asmlinkage void handle_ri_rdhwr_vivt(void);
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extern asmlinkage void handle_ri_rdhwr(void);
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extern asmlinkage void handle_cpu(void);
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extern asmlinkage void handle_ov(void);
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extern asmlinkage void handle_tr(void);
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@@ -1423,6 +1425,15 @@ void __init set_uncached_handler (unsigned long offset, void *addr, unsigned lon
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memcpy((void *)(uncached_ebase + offset), addr, size);
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}
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static int __initdata rdhwr_noopt;
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static int __init set_rdhwr_noopt(char *str)
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{
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rdhwr_noopt = 1;
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return 1;
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}
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__setup("rdhwr_noopt", set_rdhwr_noopt);
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void __init trap_init(void)
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{
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extern char except_vec3_generic, except_vec3_r4000;
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@@ -1502,7 +1513,9 @@ void __init trap_init(void)
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set_except_vector(8, handle_sys);
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set_except_vector(9, handle_bp);
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set_except_vector(10, handle_ri);
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set_except_vector(10, rdhwr_noopt ? handle_ri :
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(cpu_has_vtag_icache ?
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handle_ri_rdhwr_vivt : handle_ri_rdhwr));
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set_except_vector(11, handle_cpu);
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set_except_vector(12, handle_ov);
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set_except_vector(13, handle_tr);
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