gpio: ath79: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250910-gpio-mmio-gpio-conv-part4-v2-4-f3d1a4c57124@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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@ -10,6 +10,7 @@
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#include <linux/device.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/generic.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mod_devicetable.h>
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@ -28,7 +29,7 @@
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#define AR71XX_GPIO_REG_INT_MASK 0x24
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struct ath79_gpio_ctrl {
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struct gpio_chip gc;
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struct gpio_generic_chip chip;
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void __iomem *base;
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raw_spinlock_t lock;
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unsigned long both_edges;
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@ -37,8 +38,9 @@ struct ath79_gpio_ctrl {
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static struct ath79_gpio_ctrl *irq_data_to_ath79_gpio(struct irq_data *data)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
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return container_of(gc, struct ath79_gpio_ctrl, gc);
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return container_of(gen_gc, struct ath79_gpio_ctrl, chip);
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}
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static u32 ath79_gpio_read(struct ath79_gpio_ctrl *ctrl, unsigned reg)
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@ -72,7 +74,7 @@ static void ath79_gpio_irq_unmask(struct irq_data *data)
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u32 mask = BIT(irqd_to_hwirq(data));
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unsigned long flags;
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gpiochip_enable_irq(&ctrl->gc, irqd_to_hwirq(data));
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gpiochip_enable_irq(&ctrl->chip.gc, irqd_to_hwirq(data));
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raw_spin_lock_irqsave(&ctrl->lock, flags);
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ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
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raw_spin_unlock_irqrestore(&ctrl->lock, flags);
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@ -87,7 +89,7 @@ static void ath79_gpio_irq_mask(struct irq_data *data)
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raw_spin_lock_irqsave(&ctrl->lock, flags);
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ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
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raw_spin_unlock_irqrestore(&ctrl->lock, flags);
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gpiochip_disable_irq(&ctrl->gc, irqd_to_hwirq(data));
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gpiochip_disable_irq(&ctrl->chip.gc, irqd_to_hwirq(data));
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}
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static void ath79_gpio_irq_enable(struct irq_data *data)
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@ -187,8 +189,9 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)
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{
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struct gpio_chip *gc = irq_desc_get_handler_data(desc);
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struct irq_chip *irqchip = irq_desc_get_chip(desc);
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struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
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struct ath79_gpio_ctrl *ctrl =
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container_of(gc, struct ath79_gpio_ctrl, gc);
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container_of(gen_gc, struct ath79_gpio_ctrl, chip);
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unsigned long flags, pending;
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u32 both_edges, state;
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int irq;
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@ -224,6 +227,7 @@ MODULE_DEVICE_TABLE(of, ath79_gpio_of_match);
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static int ath79_gpio_probe(struct platform_device *pdev)
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{
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struct gpio_generic_chip_config config;
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struct device *dev = &pdev->dev;
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struct ath79_gpio_ctrl *ctrl;
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struct gpio_irq_chip *girq;
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@ -253,21 +257,26 @@ static int ath79_gpio_probe(struct platform_device *pdev)
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return PTR_ERR(ctrl->base);
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raw_spin_lock_init(&ctrl->lock);
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err = bgpio_init(&ctrl->gc, dev, 4,
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ctrl->base + AR71XX_GPIO_REG_IN,
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ctrl->base + AR71XX_GPIO_REG_SET,
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ctrl->base + AR71XX_GPIO_REG_CLEAR,
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oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE,
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oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL,
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0);
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config = (struct gpio_generic_chip_config) {
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.dev = dev,
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.sz = 4,
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.dat = ctrl->base + AR71XX_GPIO_REG_IN,
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.set = ctrl->base + AR71XX_GPIO_REG_SET,
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.clr = ctrl->base + AR71XX_GPIO_REG_CLEAR,
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.dirout = oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE,
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.dirin = oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL,
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};
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err = gpio_generic_chip_init(&ctrl->chip, &config);
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if (err) {
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dev_err(dev, "bgpio_init failed\n");
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dev_err(dev, "failed to initialize generic GPIO chip\n");
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return err;
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}
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/* Optional interrupt setup */
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if (device_property_read_bool(dev, "interrupt-controller")) {
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girq = &ctrl->gc.irq;
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girq = &ctrl->chip.gc.irq;
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gpio_irq_chip_set_chip(girq, &ath79_gpio_irqchip);
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girq->parent_handler = ath79_gpio_irq_handler;
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girq->num_parents = 1;
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@ -280,7 +289,7 @@ static int ath79_gpio_probe(struct platform_device *pdev)
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girq->handler = handle_simple_irq;
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}
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return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl);
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return devm_gpiochip_add_data(dev, &ctrl->chip.gc, ctrl);
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}
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static struct platform_driver ath79_gpio_driver = {
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