diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c
index c6dfc5b5d7e0..cf94251e149c 100644
--- a/drivers/mtd/spi-nor/everspin.c
+++ b/drivers/mtd/spi-nor/everspin.c
@@ -49,8 +49,17 @@ static void everspin_mram_default_init(struct spi_nor *nor)
 		u8 sr1 = nor->bouncebuf[0];
 		u8 bp_bits = (sr1 & GENMASK(5, 2)) >> 2;
 		dev_info(nor->dev, "SR1: 0x%02x | BP bits: 0x%x (0 = no protection)\n", sr1, bp_bits);
-		if (bp_bits)
-			dev_warn(nor->dev, "Hardware write protection (BP bits) is active!\n");
+		if (bp_bits) {
+			dev_info(nor->dev, "Unlocking MRAM (clearing BP bits)...\n");
+			spi_nor_write_enable(nor);
+			nor->bouncebuf[0] = 0;
+			op = (struct spi_mem_op)
+				SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1),
+					   SPI_MEM_OP_NO_ADDR,
+					   SPI_MEM_OP_NO_DUMMY,
+					   SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
+			spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
+		}
 	}
 
 	/* 2. Switch to Octal Mode via CFR1V */