dt-bindings: net: cdns,macb: Convert to json-schema
Convert the Cadence MACB/GEM Ethernet controller Device Tree binding
documentation to json-schema.
Re-add "cdns,gem" (removed in commit a217d8711d ("dt-bindings:
Remove PicoXcell bindings")) as there are active users on non-PicoXcell
platforms.
Add missing "ether_clk" clock.
Add missing properties.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/104dcbfd22f95fc77de9fe15e8abd83869603ea5.1637927673.git.geert@linux-m68k.org
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Geert Uytterhoeven
committed by
Rob Herring
Rob Herring
parent
ca1e147c2d
commit
4e5b6de1f4
@@ -0,0 +1,159 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/cdns,macb.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence MACB/GEM Ethernet controller
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maintainers:
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- Nicolas Ferre <nicolas.ferre@microchip.com>
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- Claudiu Beznea <claudiu.beznea@microchip.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- cdns,at91rm9200-emac # Atmel at91rm9200 SoC
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- const: cdns,emac # Generic
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- items:
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- enum:
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- cdns,zynq-gem # Xilinx Zynq-7xxx SoC
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- cdns,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC
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- const: cdns,gem # Generic
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- items:
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- enum:
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- cdns,at91sam9260-macb # Atmel at91sam9 SoCs
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- cdns,sam9x60-macb # Microchip sam9x60 SoC
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- const: cdns,macb # Generic
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- items:
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- enum:
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- atmel,sama5d3-macb # 10/100Mbit IP on Atmel sama5d3 SoCs
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- enum:
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- cdns,at91sam9260-macb # Atmel at91sam9 SoCs.
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- const: cdns,macb # Generic
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- enum:
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- atmel,sama5d29-gem # GEM XL IP (10/100) on Atmel sama5d29 SoCs
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- atmel,sama5d2-gem # GEM IP (10/100) on Atmel sama5d2 SoCs
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- atmel,sama5d3-gem # Gigabit IP on Atmel sama5d3 SoCs
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- atmel,sama5d4-gem # GEM IP (10/100) on Atmel sama5d4 SoCs
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- cdns,at32ap7000-macb # Other 10/100 usage or use the generic form
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- cdns,np4-macb # NP4 SoC devices
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- microchip,sama7g5-emac # Microchip SAMA7G5 ethernet interface
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- microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
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- sifive,fu540-c000-gem # SiFive FU540-C000 SoC
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- cdns,emac # Generic
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- cdns,gem # Generic
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- cdns,macb # Generic
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reg:
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minItems: 1
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items:
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- description: Basic register set
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- description: GEMGXL Management block registers on SiFive FU540-C000 SoC
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interrupts:
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minItems: 1
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maxItems: 8
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description: One interrupt per available hardware queue
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clocks:
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minItems: 1
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maxItems: 5
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clock-names:
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minItems: 1
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items:
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- enum: [ ether_clk, hclk, pclk ]
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- enum: [ hclk, pclk ]
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- const: tx_clk
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- enum: [ rx_clk, tsu_clk ]
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- const: tsu_clk
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local-mac-address: true
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phy-mode: true
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phy-handle: true
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fixed-link: true
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iommus:
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maxItems: 1
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power-domains:
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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mdio:
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type: object
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description:
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Node containing PHY children. If this node is not present, then PHYs will
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be direct children.
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patternProperties:
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"^ethernet-phy@[0-9a-f]$":
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type: object
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$ref: ethernet-phy.yaml#
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properties:
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reset-gpios: true
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magic-packet:
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description:
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Indicates that the hardware supports waking up via magic packet.
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- phy-mode
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allOf:
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- $ref: ethernet-controller.yaml#
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- if:
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not:
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properties:
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compatible:
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contains:
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const: sifive,fu540-c000-gem
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then:
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properties:
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reg:
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maxItems: 1
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unevaluatedProperties: false
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examples:
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- |
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macb0: ethernet@fffc4000 {
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compatible = "cdns,at32ap7000-macb";
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reg = <0xfffc4000 0x4000>;
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interrupts = <21>;
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phy-mode = "rmii";
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local-mac-address = [3a 0e 03 04 05 06];
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@1 {
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reg = <0x1>;
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reset-gpios = <&pioE 6 1>;
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};
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};
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@@ -1,60 +0,0 @@
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* Cadence MACB/GEM Ethernet controller
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Required properties:
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- compatible: Should be "cdns,[<chip>-]{macb|gem}"
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Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
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Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
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Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC.
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Use "cdns,np4-macb" for NP4 SoC devices.
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Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
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Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
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Use "atmel,sama5d29-gem" for GEM XL IP (10/100) available on Atmel sama5d29 SoCs.
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Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs.
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Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.
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Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.
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Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.
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Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC.
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Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC.
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Use "microchip,sama7g5-emac" for Microchip SAMA7G5 ethernet interface.
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Use "microchip,sama7g5-gem" for Microchip SAMA7G5 gigabit ethernet interface.
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Or the generic form: "cdns,emac".
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- reg: Address and length of the register set for the device
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For "sifive,fu540-c000-gem", second range is required to specify the
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address and length of the registers for GEMGXL Management block.
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- interrupts: Should contain macb interrupt
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- phy-mode: See ethernet.txt file in the same directory.
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- clock-names: Tuple listing input clock names.
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Required elements: 'pclk', 'hclk'
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Optional elements: 'tx_clk'
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Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
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Optional elements: 'tsu_clk'
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- clocks: Phandles to input clocks.
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Optional properties:
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- mdio: node containing PHY children. If this node is not present, then PHYs
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will be direct children.
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The MAC address will be determined using the optional properties
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defined in ethernet.txt.
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Optional properties for PHY child node:
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- reset-gpios : Should specify the gpio for phy reset
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- magic-packet : If present, indicates that the hardware supports waking
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up via magic packet.
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- phy-handle : see ethernet.txt file in the same directory
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Examples:
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macb0: ethernet@fffc4000 {
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compatible = "cdns,at32ap7000-macb";
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reg = <0xfffc4000 0x4000>;
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interrupts = <21>;
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phy-mode = "rmii";
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local-mac-address = [3a 0e 03 04 05 06];
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
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ethernet-phy@1 {
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reg = <0x1>;
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reset-gpios = <&pioE 6 1>;
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};
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};
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