dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility

This cache controller is also used on the ESWIN EIC7700 SoC.
However, it have 256KB private L2 Cache and shared L3 Cache of 4MB.
So add dedicated compatible string for it.

Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Pritesh Patel 2025-03-20 16:24:44 +05:30 committed by Conor Dooley
parent 0af2f6be1b
commit 2eb6836615

@ -39,6 +39,7 @@ properties:
- const: cache
- items:
- enum:
- eswin,eic7700-l3-cache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
- const: sifive,ccache0
@ -55,10 +56,10 @@ properties:
enum: [2, 3]
cache-sets:
enum: [1024, 2048]
enum: [1024, 2048, 4096]
cache-size:
const: 2097152
enum: [2097152, 4194304]
cache-unified: true
@ -89,6 +90,7 @@ allOf:
compatible:
contains:
enum:
- eswin,eic7700-l3-cache
- sifive,fu740-c000-ccache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
@ -108,6 +110,22 @@ allOf:
Must contain entries for DirError, DataError and DataFail signals.
maxItems: 3
- if:
properties:
compatible:
contains:
const: eswin,eic7700-l3-cache
then:
properties:
cache-size:
const: 4194304
else:
properties:
cache-size:
const: 2097152
- if:
properties:
compatible:
@ -122,11 +140,31 @@ allOf:
cache-sets:
const: 2048
else:
- if:
properties:
compatible:
contains:
enum:
- microchip,mpfs-ccache
- sifive,fu540-c000-ccache
then:
properties:
cache-sets:
const: 1024
- if:
properties:
compatible:
contains:
enum:
- eswin,eic7700-l3-cache
then:
properties:
cache-sets:
const: 4096
- if:
properties:
compatible: