From 285d66e576c879512f6d7ebbd5dbb6a5b766ccc4 Mon Sep 17 00:00:00 2001 From: Oleg Karfich Date: Mon, 28 Jun 2021 14:42:34 +0200 Subject: [PATCH] arm: add wago compact controller 751-9301 Signed-off-by: Oleg Karfich --- arch/arm/boot/dts/st/Makefile | 1 + .../boot/dts/st/stm32mp151-cc100-pinctrl.dtsi | 490 +++++++++++++ arch/arm/boot/dts/st/stm32mp151-cc100.dts | 107 +++ arch/arm/boot/dts/st/stm32mp151-cc100.dtsi | 663 ++++++++++++++++++ arch/arm/boot/dts/wago-devconf.dtsi | 1 + arch/arm/configs/stm32mp1_defconfig | 552 +++++++++++++++ 6 files changed, 1814 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32mp151-cc100-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/st/stm32mp151-cc100.dts create mode 100644 arch/arm/boot/dts/st/stm32mp151-cc100.dtsi create mode 100644 arch/arm/configs/stm32mp1_defconfig diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index 44b264c399ec..4a26318473a1 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32h743i-disco.dtb \ stm32h750i-art-pi.dtb \ stm32mp135f-dk.dtb \ + stm32mp151-cc100.dtb \ stm32mp151a-prtt1a.dtb \ stm32mp151a-prtt1c.dtb \ stm32mp151a-prtt1s.dtb \ diff --git a/arch/arm/boot/dts/st/stm32mp151-cc100-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp151-cc100-pinctrl.dtsi new file mode 100644 index 000000000000..83b48dc74211 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp151-cc100-pinctrl.dtsi @@ -0,0 +1,490 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2017 - All Rights Reserved + * Author: Ludovic Barre for STMicroelectronics. + */ +#include + +&pinctrl { + adc12_ain_pins_a: adc12-ain-0 { + pins { + pinmux = , /* ADC1_INP13 -> ADC1-IN1 */ + , /* ADC1_INP5 -> ADC1-RE1 */ + , /* ADC1_INP15 -> ADC1-RE2 */ + ; /* ADC2_INP3 -> ADC2-IN1 */ + }; + }; + + dac_ch1_pins_a: dac-ch1-0 { + pins { + pinmux = ; + }; + }; + + dac_ch2_pins_a: dac-ch2-0 { + pins { + pinmux = ; + }; + }; + + eth1_pins_a: eth1_a-0 { + pins1 { + pinmux = , /* ETH1_REF_CLK */ + , /* ETH1_TXD1 */ + ; /* ETH1_TXD0 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = , /* ETH1_CRS_DV */ + , /* ETH1_RXD0 */ + ; /* ETH1_RXD1 */ + bias-disable; + }; + pins3 { + pinmux = ; /* ETH1_TX_EN */ + }; + }; + + eth1_sleep_pins_a: eth1_sleep_a-0 { + pins { + pinmux = , /* ETH1_REF_CLK */ + , /* ETH1_CRS_DV */ + , /* ETH1_TX_EN */ + , /* ETH1_TXD1 */ + , /* ETH1_RXD0 */ + , /* ETH1_RXD1 */ + ; /* ETH1_TXD0 */ + }; + }; + + i2c2_pins_a: i2c2-0 { + pins { + pinmux = , /* I2C2_SCL */ + ; /* I2C2_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_sleep_pins_a: i2c2-sleep-0 { + pins { + pinmux = , /* I2C2_SCL */ + ; /* I2C2_SDA */ + }; + }; + + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins1 { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + ; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC1_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + ; /* SDMMC1_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC1_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = ; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + , /* SDMMC1_CK */ + ; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_dir_pins_a: sdmmc1-dir-0 { + pins1 { + pinmux = , /* SDMMC1_D0DIR */ + , /* SDMMC1_D123DIR */ + ; /* SDMMC1_CDIR */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2{ + pinmux = ; /* SDMMC1_CKIN */ + bias-pull-up; + }; + }; + + sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { + pins { + pinmux = , /* SDMMC1_D0DIR */ + , /* SDMMC1_D123DIR */ + , /* SDMMC1_CDIR */ + ; /* SDMMC1_CKIN */ + }; + }; + + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + pins3 { + pinmux = ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_CK */ + ; /* SDMMC2_CMD */ + }; + }; + + sdmmc2_b4_pins_b: sdmmc2-b4-1 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + }; + }; + + spi5_pins_a: spi5-0 { + pins1 { + pinmux = , /* SPI5_SCK */ + ; /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + + pins2 { + pinmux = ; /* SPI5_MISO */ + bias-disable; + }; + }; + + uart4_pins_a: uart4_a-0 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_idle_pins_a: uart4_idle_pins_a { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4_sleep_a-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + + usbotg_hs_pins_a: usbotg-hs-0 { + pins { + pinmux = ; /* OTG_ID */ + }; + }; + + i2c4_pins_a: i2c4-0 { + pins { + pinmux = , /* I2C4_SCL */ + ; /* I2C4_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c4_pins_a_sleep: i2c4-1 { + pins { + pinmux = , /* I2C4_SCL */ + ; /* I2C4_SDA */ + }; + }; + + /* FMC pin configuration inspired by arch/arm/boot/dts/stm32mp15-pinctrl.dtsi */ + fmc_pins_a: fmc-0 { + pins1 { + pinmux = , /* FMC.NCS */ + , /* FMC.NOE */ + , /* FMC.NRW */ + , /* FMC.NEB0 */ + , /* FMC.NEB1 */ + , /* FMC.A0 */ + , /* FMC.A1 */ + , /* FMC.A2 */ + , /* FMC.A3 */ + , /* FMC.A4 */ + , /* FMC.A5 */ + , /* FMC.A6 */ + , /* FMC.A7 */ + , /* FMC.A8 */ + , /* FMC.A9 */ + , /* FMC.A10 */ + , /* FMC.A11 */ + , /* FMC.A12 */ + , /* FMC.A13 */ + , /* FMC.A14 */ + , /* FMC.A15 */ + , /* FMC.A16 */ + , /* FMC.A17 */ + , /* FMC.A18 */ + , /* FMC.D0 */ + , /* FMC.D1 */ + , /* FMC.D2 */ + , /* FMC.D3 */ + , /* FMC.D4 */ + , /* FMC.D5 */ + , /* FMC.D6 */ + , /* FMC.D7 */ + , /* FMC.D8 */ + , /* FMC.D9 */ + , /* FMC.D10 */ + , /* FMC.D11 */ + , /* FMC.D12 */ + , /* FMC.D13 */ + , /* FMC.D14 */ + ; /* FMC.D15 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = ; /* FMC_NWAIT */ + bias-pull-up; + }; + }; + + fmc_sleep_pins_a: fmc-sleep-0 { + pins1 { + pinmux = , /* FMC.NCS */ + , /* FMC.NOE */ + , /* FMC.NRW */ + , /* FMC.NEB0 */ + , /* FMC.NEB1 */ + , /* FMC.A0 */ + , /* FMC.A1 */ + , /* FMC.A2 */ + , /* FMC.A3 */ + , /* FMC.A4 */ + , /* FMC.A5 */ + , /* FMC.A6 */ + , /* FMC.A7 */ + , /* FMC.A8 */ + , /* FMC.A9 */ + , /* FMC.A10 */ + , /* FMC.A11 */ + , /* FMC.A12 */ + , /* FMC.A13 */ + , /* FMC.A14 */ + , /* FMC.A15 */ + , /* FMC.A16 */ + , /* FMC.A17 */ + , /* FMC.A18 */ + , /* FMC.D0 */ + , /* FMC.D1 */ + , /* FMC.D2 */ + , /* FMC.D3 */ + , /* FMC.D4 */ + , /* FMC.D5 */ + , /* FMC.D6 */ + , /* FMC.D7 */ + , /* FMC.D8 */ + , /* FMC.D9 */ + , /* FMC.D10 */ + , /* FMC.D11 */ + , /* FMC.D12 */ + , /* FMC.D13 */ + , /* FMC.D14 */ + , /* FMC.D15 */ + ; /* FMC_NWAIT */ + }; + }; +}; + +&pinctrl_z { + usart1_pins_a: usart1-0 { + pins1 { + pinmux = ; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART1_RX */ + ; /* USART1_RTS DIR */ + bias-disable; + }; + /* The UART CTS (PZ3) is connected to RS485-NRE. The linux + * drivers does not support RS485-NRE, only driver enable + * (RS485-DIR) is used. The RS485-DIR is connected to both DE + * and nRE -> therefore, the CTS (RS485-NRE) is forced to 0. + */ + pins3 { + pinmux = ; /* USART1_CTS NRE */ + output-low; + }; + }; + + usart1_idle_pins_a: usart1_idle_pins_a { + pins1 { + pinmux = ; /* USART1_TX */ + }; + pins2 { + pinmux = , /* USART1_RX */ + ; /* USART1_RTS DIR */ + }; + /* see usart1_pins_a */ + pins3 { + pinmux = ; /* USART1_CTS NRE */ + output-low; + }; + }; + + usart1_sleep_pins_a: usart1_sleep_a-0 { + pins { + pinmux = , /* USART1_TX */ + , /* USART1_RX */ + , /* USART1_CTS NRE */ + ; /* USART1_RTS DIR */ + }; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp151-cc100.dts b/arch/arm/boot/dts/st/stm32mp151-cc100.dts new file mode 100644 index 000000000000..d5f04a1e0d9c --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp151-cc100.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2017 - All Rights Reserved + * Author: Ludovic Barre for STMicroelectronics. + */ +/dts-v1/; + +#include "stm32mp151.dtsi" +#include "stm32mp151-cc100.dtsi" +#include "wago-devconf.dtsi" + +/ { + model = "CC100-751-9301"; + compatible = "wago,stm32mp151-cc100-751_9301-1011", "wago,stm32mp151-cc100", "st,stm32mp151"; + + memory@c0000000 { + reg = <0xC0000000 0x20000000>; /* 512MB RAM */ + }; + + chosen { + stdout-path = " serial0:115200n8"; + }; + + usb_phy_tuning: usb-phy-tuning { + st,hs-dc-level = <2>; + st,fs-rftime-tuning; + st,hs-rftime-reduction; + st,hs-current-trim = <15>; + st,hs-impedance-trim = <1>; + st,squelch-level = <3>; + st,hs-rx-offset = <2>; + st,no-lsfs-sc; + }; + +}; + +&wsysinit { + board,variant = "CC100"; + status = "okay"; +}; + +&spi5 { + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins_a>; + cs-gpios = <&gpioh 5 0>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + din0_spi: din_spi@0 { + compatible = "din_spi"; + reg = <0>; + spi-cpol; + spi-max-frequency = <1000000>; + gpio-load = <&gpioz 1 GPIO_ACTIVE_LOW>; + gpio-tok = <&gpioz 0 GPIO_ACTIVE_LOW>; + leds-gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>, + <&gpioj 14 GPIO_ACTIVE_HIGH>, + <&gpiok 3 GPIO_ACTIVE_HIGH>, + <&gpiok 7 GPIO_ACTIVE_HIGH>, + <&gpiok 6 GPIO_ACTIVE_HIGH>, + <&gpioi 14 GPIO_ACTIVE_HIGH>, + <&gpioi 12 GPIO_ACTIVE_HIGH>, + <&gpioi 13 GPIO_ACTIVE_HIGH>; + }; +}; + +&usbotg_hs { + compatible = "st,stm32mp1-hsotg", "snps,dwc2"; + pinctrl-names = "default"; + pinctrl-0 = <&usbotg_hs_pins_a>; /* configure OTG_ID pin */ + phys = <&usbphyc_port1 0>; /* 0: UTMI switch selects the OTG controller */ + phy-names = "usb2-phy"; + vbus-supply = <&vbus_otg>; + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + st,phy-tuning = <&usb_phy_tuning>; + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; +}; + +&usbphyc_port1 { + st,phy-tuning = <&usb_phy_tuning>; + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; +}; + +&bitbang_mdio0 { + status = "okay"; +}; + +&ksz8863_switch { + status = "okay"; +}; + +&swcfg_ksz8863 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/st/stm32mp151-cc100.dtsi b/arch/arm/boot/dts/st/stm32mp151-cc100.dtsi new file mode 100644 index 000000000000..fb490daea8fd --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp151-cc100.dtsi @@ -0,0 +1,663 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2020 elrest GmbH + */ + +#include "stm32mp151.dtsi" +#include "stm32mp151-cc100-pinctrl.dtsi" +#include "stm32mp15xxaa-pinctrl.dtsi" +#include +#include +#include +#include + +/ { + aliases { + serial0 = &uart4; + serial1 = &usart1; + ethernet0 = ðernet0; + mdio-gpio0 = &bitbang_mdio0; + i2c0 = &i2c4; + i2c1 = &i2c2; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x2000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x2000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10044000 { + compatible = "shared-dma-pool"; + reg = <0x10044000 0x4000>; + no-map; + }; + + }; + + sram: sram@10050000 { + compatible = "mmio-sram"; + reg = <0x10050000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x10050000 0x10000>; + + dma_pool: dma_pool@0 { + reg = <0x0 0x10000>; + pool; + }; + }; + + led { + compatible = "gpio-leds"; + u1-red { + label = "u1-red"; + gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + u1-green { + label = "u1-green"; + gpios = <&gpioj 1 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + sys-red { + label = "sys-red"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + sys-green { + label = "sys-green"; + gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + run-red { + label = "run-red"; + gpios = <&gpiob 12 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + run-green { + label = "run-green"; + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + led-mmc { + label = "led-mmc"; + gpios = <&gpiog 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + }; + + PAC-Operating-Mode-Switch { + compatible = "gpio-keys"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + run { + label = "RUN"; + gpios = <&gpioj 6 GPIO_ACTIVE_LOW>; /* GPIO J 6 */ + linux,code = <1>; + linux,input-type = ; + debounce-interval = <1>; /* debounce in msecs */ + }; + + stop { + label = "STOP"; + gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; /* GPIO A 8 */ + linux,code = <2>; + linux,input-type = ; + debounce-interval = <1>; /* debounce in msecs */ + }; + + reset { + label = "RESET"; + gpios = <&gpioi 11 GPIO_ACTIVE_LOW>; /* GPIO I 11 */ + linux,code = <3>; + linux,input-type = <1>; + debounce-interval = <1>; /* debounce in msecs */ + }; + + reset_all { + label = "RESET_ALL"; + gpios = <&gpioz 4 GPIO_ACTIVE_LOW>; /* GPIO Z 4 */ + linux,code = <4>; + linux,input-type = <1>; + debounce-interval = <1>; /* debounce in msecs */ + }; + }; + + sd_switch: regulator-sd_switch { + compatible = "regulator-fixed"; + regulator-name = "sd_switch"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-type = "voltage"; + regulator-always-on; + enable-active-high; + + gpio = <&gpioi 4 GPIO_ACTIVE_HIGH>; + }; + + vrs5v: regulator-rs485-5v { + compatible = "regulator-fixed"; + regulator-name = "rs485-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-type = "voltage"; + regulator-always-on; + enable-active-high; + + gpio = <&gpioh 14 GPIO_ACTIVE_HIGH>; + }; + + vref: regulator-vref { + compatible = "regulator-fixed"; + regulator-name = "vref"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-type = "voltage"; + regulator-always-on; + vin-supply = <&vdda>; + }; + + wsysinit: wsysinit_init { + compatible = "wago,sysinit"; + add-sysfs-entries; + + tty,service = "ttySTM0"; + tty,rs232-485 = "ttySTM1"; + + /* sysclock adjustments, empirical values */ + adjtimex,tick = <10000>; + adjtimex,frequency = <200000>; + }; + + dout_drv { + compatible = "elrest,dout_drv"; + douts-gpios = <&gpioh 10 GPIO_ACTIVE_HIGH>, /* bit 0 */ + <&gpioi 8 GPIO_ACTIVE_HIGH>, + <&gpioi 2 GPIO_ACTIVE_HIGH>, + <&gpioi 6 GPIO_ACTIVE_HIGH>; + leds-gpios = <&gpioj 15 GPIO_ACTIVE_HIGH>, /* bit 0 LED */ + <&gpioj 12 GPIO_ACTIVE_HIGH>, + <&gpiok 5 GPIO_ACTIVE_HIGH>, + <&gpiok 4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + bitbang_mdio0: gpio_mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = < + &gpioc 1 0 /* 0: mdc */ + &gpioa 2 0 /* 1: mdio */ + >; + status = "disabled"; + }; + + swcfg_ksz8863: swcfg_ksz8863 { + compatible = "swcfg,ksz8863"; + status = "disabled"; + + swcfg,mii-bus = <&bitbang_mdio0>; + swcfg,alias = "ksz8863"; + swcfg,cpu_port = <2>; + swcfg,ports = <3>; + swcfg,vlans = <16>; + swcfg,switch = <&ksz8863_switch>; + }; + +}; + +&bitbang_mdio0 { + ksz8863_switch: switch@0 { + compatible = "micrel,ksz8863"; + //micrel,rmii-reference-clock-select-25mhz; + + #address-cells = <1>; + #size-cells = <0>; + + ksz,reset-gpio = <&gpiog 7 GPIO_ACTIVE_LOW>; + + reg = <0>; + dsa,member = <0 0>; + dsa,enable-on-boot; + + ksz,reset-switch; + //ksz,disable-internal-ldo; + + phy-mode = "rmii"; + + interrupt-parent = <&gpiog>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <1>; + label = "ethX1"; + phy-mode = "rmii"; + phy-pwrdown; + }; + + port@1 { + reg = <2>; + label = "ethX2"; + phy-mode = "rmii"; + phy-pwrdown; + }; + + port@2 { + reg = <3>; + label = "cpu"; + phy-mode = "rmii"; + ethernet = <ðernet0>; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + +}; + +ðernet0 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð1_pins_a>; + pinctrl-1 = <ð1_sleep_pins_a>; + phy-mode = "rmii"; + max-speed = <100>; + + fixed-link { + speed = <100>; + full-duplex; + }; +}; + +&adc { + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_a>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vref>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <1 5 13 15>; + st,min-sample-time-nsecs = <10000>; + assigned-resolution-bits = <16>; + status = "okay"; + }; + + adc2: adc@100 { + st,adc-channels = <0 3>; + st,min-sample-time-nsecs = <10000>; + assigned-resolution-bits = <16>; + status = "okay"; + }; +}; + +&dac { + pinctrl-names = "default"; + pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; + vref-supply = <&vref>; + status = "okay"; + dac1: dac@1 { + status = "okay"; + }; + dac2: dac@2 { + status = "okay"; + }; +}; + +&cpu0{ + cpu-supply = <&vddcore>; +}; + +&dma1 { + sram = <&dma_pool>; +}; + +&dma2 { + sram = <&dma_pool>; +}; + +&dts { + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + rtc_r2221t@32 { + compatible = "ricoh,r2221tl"; + reg = <0x32>; + + interrupt-parent = <&gpiob>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&i2c4 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c4_pins_a>; + pinctrl-1 = <&i2c4_pins_a_sleep>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + eeprom: m24c512@54 { + compatible = "st,24c512", "at24"; + reg = <0x54>; + }; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo1-supply = <&v3v3>; + ldo2-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo5-supply = <&v3v3>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask-reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + regulator-boot-on; + }; + + vdd_sd: ldo5 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + regulator-boot-on; + }; + + vdda: ldo6 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + interrupts = ; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + regulator-over-current-protection; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = ; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; + regulator-active-discharge; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; + regulator-active-discharge; + }; + }; + + pmic_watchdog: watchdog { + compatible = "st,stpmic1-wdt"; + status = "okay"; + }; + }; + + lm75: lm75@49 { + compatible = "national,lm75"; + reg = <0x49>; + }; +}; + + +&ipcc { + status = "okay"; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + interrupt-names = "wdg"; + wakeup-source; + recovery; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&rng1 { + status = "okay"; +}; + +&rtc { + status = "disabled"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + max-frequency = <12500000>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width = <8>; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&v3v3>; + mmc-ddr-3_3v; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + //uart-has-rtscts; + //cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; + //rts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usart1 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart1_pins_a>; + pinctrl-1 = <&usart1_idle_pins_a>; + pinctrl-2 = <&usart1_sleep_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + /* Disable uart HW control - the HW control control use CTS as input, + * but the CC-100 use CTS as output RS485 NRE signal -> the HW control + * and uart-has-rtscts are disabled. + */ + //uart-has-rtscts; + /delete-property/st,hw-flow-ctrl; + + rs485-rts-active-high; + rs485-rts-delay = <1 1>; /* tPZH, tPZL = 100ns */ + /* The WAGO patch sync-with-topic-rg-next-vtpctp-5.10-9b893ae5a174.patch + * removes the TIOCGRS485 and TIOCSRS485 and the RS485 cannot be + * therefore control by ioctls -> it is enabled by default here. + */ + linux,rs485-enabled-at-boot-time; + + status = "okay"; +}; + +&fmc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&fmc_pins_a>; + pinctrl-1 = <&fmc_sleep_pins_a>; + status = "okay"; + + /* nvSRAM connected to the FMC (use UIO driver as in TP600) */ + nvsram@0,0 { + compatible = "uio_pdrv_genirq"; + /* 128kB nvSRAM -> the beginning of the first subbunks of bank 1 */ + reg = <0 0x0 0x20000>; + linux,uio-name = "UIO_NVRAM"; + + /* assynchronous SRAM mode */ + st,fmc2-ebi-cs-transaction-type = <0>; + + st,fmc2-ebi-cs-buswidth = <16>; + + /* The BWTR registers are not used in assynchronous SRAM mode + * (EXTMOD = 0). The timing settings are shared for read and + * write. The write specific settings can be omitted (this + * applies to all ebi-cs-write DTS properties). + * + * The address and data hold time are set to minimal value + * to ensure the address/data are not released before the + * read/write enable at the nvSRAM interface (due to potential + * difference of signal delays between processor and nvSRAM). + */ + st,fmc2-ebi-cs-byte-lane-setup-ns = <0>; + st,fmc2-ebi-cs-address-setup-ns = <5>; + st,fmc2-ebi-cs-address-hold-ns = <1>; + st,fmc2-ebi-cs-data-setup-ns = <20>; + st,fmc2-ebi-cs-data-hold-ns = <1>; + st,fmc2-ebi-cs-bus-turnaround-ns = <0>; + }; +}; diff --git a/arch/arm/boot/dts/wago-devconf.dtsi b/arch/arm/boot/dts/wago-devconf.dtsi index e7f2870963cc..7966c2315582 100644 --- a/arch/arm/boot/dts/wago-devconf.dtsi +++ b/arch/arm/boot/dts/wago-devconf.dtsi @@ -51,6 +51,7 @@ * | 1008 | VTP 15" 762-4xxx | * | 1009 | VTP 21" 762-4xxx | * | 1010 | EC 752-8303 | + * | 1011 | CC100 751-9301 | * |-----------------|--------------------| * * ============== LEGACY FORMAT ================================================ diff --git a/arch/arm/configs/stm32mp1_defconfig b/arch/arm/configs/stm32mp1_defconfig new file mode 100644 index 000000000000..0a16c45b860a --- /dev/null +++ b/arch/arm/configs/stm32mp1_defconfig @@ -0,0 +1,552 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_RT=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_NAMESPACES=y +CONFIG_RELAY=y +CONFIG_BOOT_CONFIG=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +CONFIG_WAGO_SYSTEM_BASED_STARTUP=y +CONFIG_IRQ_PRIORITY_TABLE=y +CONFIG_ARCH_STM32=y +CONFIG_ARM_THUMBEE=y +CONFIG_PL310_ERRATA_588369=y +CONFIG_PL310_ERRATA_727915=y +CONFIG_PL310_ERRATA_753970=y +CONFIG_PL310_ERRATA_769419=y +CONFIG_ARM_ERRATA_430973=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_754327=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_ERRATA_798181=y +CONFIG_SMP=y +CONFIG_MCPM=y +CONFIG_NR_CPUS=16 +CONFIG_HOTPLUG_CPU=y +CONFIG_HIGHMEM=y +CONFIG_FORCE_MAX_ZONEORDER=12 +CONFIG_DEPRECATED_PARAM_STRUCT=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPU_IDLE=y +CONFIG_ARM_CPUIDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_ARM_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA1_ARM_CE=m +CONFIG_CRYPTO_SHA2_ARM_CE=m +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_AES_ARM=m +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_AES_ARM_CE=m +CONFIG_CRYPTO_GHASH_ARM_CE=m +CONFIG_CRYPTO_CRC32_ARM_CE=m +CONFIG_CRYPTO_CHACHA20_NEON=m +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_CMDLINE_PARTITION=y +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=m +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IPGRE=m +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +CONFIG_INET_UDP_DIAG=m +CONFIG_TCP_CONG_ADVANCED=y +# CONFIG_TCP_CONG_BIC is not set +# CONFIG_TCP_CONG_CUBIC is not set +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_GRE=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_HL=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_ECN=y +CONFIG_NETFILTER_XT_MATCH_ESP=y +CONFIG_NETFILTER_XT_MATCH_HL=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_IPVS=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y +CONFIG_IP_VS=m +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_IP=y +CONFIG_BRIDGE_EBT_LIMIT=y +CONFIG_BRIDGE_EBT_LOG=y +CONFIG_L2TP=m +CONFIG_BRIDGE=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_NET_DSA_TAG_TRAILER=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_HFSC=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_TBF=y +CONFIG_NET_SCH_CODEL=y +CONFIG_NET_SCH_FQ_CODEL=y +CONFIG_NET_CLS_BASIC=y +CONFIG_NET_CLS_TCINDEX=y +CONFIG_NET_CLS_ROUTE4=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +CONFIG_NET_ACT_GACT=y +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_NET_ACT_IPT=y +CONFIG_NET_ACT_NAT=y +CONFIG_NET_ACT_PEDIT=y +CONFIG_NET_ACT_SKBEDIT=y +CONFIG_NET_ACT_CSUM=y +CONFIG_NETLINK_DIAG=y +CONFIG_NET_L3_MASTER_DEV=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_BPF_JIT=y +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_SIMPLE_PM_BUS=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_VIRTIO_BLK=y +CONFIG_ICS932S401=y +CONFIG_SRAM=y +# CONFIG_ENCSW is not set +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_93CX6=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_VETH=y +CONFIG_NET_DSA_KSZ8863=y +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +CONFIG_STMMAC_ETH=y +CONFIG_DWMAC_DWC_QOS_ETH=y +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_SWCONFIG=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=y +CONFIG_SWCFG_KSZ8863=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_GPIO=y +# CONFIG_USB_NET_DRIVERS is not set +# CONFIG_WLAN is not set +CONFIG_NET_FAILOVER=y +CONFIG_INPUT_MATRIXKMAP=y +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_AMBAKMI=y +CONFIG_SERIO_LIBPS2=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_OMAP_MODBUS is not set +CONFIG_SERIAL_STM32=y +CONFIG_SERIAL_STM32_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_TTY_PRINTK=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_ARB_GPIO_CHALLENGE=m +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PINCTRL=y +CONFIG_I2C_DEMUX_PINCTRL=y +CONFIG_I2C_NOMADIK=y +CONFIG_I2C_STM32F7=y +CONFIG_I2C_SLAVE_EEPROM=y +CONFIG_SPI=y +CONFIG_SPI_STM32=y +CONFIG_SPI_STM32_QSPI=y +CONFIG_SPI_SPIDEV=y +CONFIG_SPMI=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_DWAPB=y +CONFIG_GPIO_SYSCON=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMKONA=y +CONFIG_POWER_RESET_BRCMSTB=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_BATTERY_SBS=y +CONFIG_BATTERY_MAX17040=m +CONFIG_BATTERY_MAX17042=m +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_SENSORS_LM90=y +CONFIG_SENSORS_LM95245=y +CONFIG_SENSORS_NTC_THERMISTOR=m +CONFIG_SENSORS_PWM_FAN=m +CONFIG_SENSORS_INA2XX=m +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_ST_THERMAL_MEMMAP=y +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_DW_WATCHDOG=y +CONFIG_STPMIC1_WATCHDOG=y +CONFIG_BCMA=y +CONFIG_BCMA_HOST_SOC=y +CONFIG_BCMA_DRIVER_GMAC_CMN=y +CONFIG_BCMA_DRIVER_GPIO=y +CONFIG_MFD_STM32_LPTIMER=y +CONFIG_MFD_STPMIC1=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_VIRTUAL_CONSUMER=y +CONFIG_REGULATOR_USERSPACE_CONSUMER=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_STM32_BOOSTER=y +CONFIG_REGULATOR_STM32_VREFBUF=y +CONFIG_REGULATOR_STM32_PWR=y +CONFIG_REGULATOR_STPMIC1=y +CONFIG_REGULATOR_VCTRL=y +# CONFIG_HID_GENERIC is not set +CONFIG_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_PERIPHERAL=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_GPIO_VBUS=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_ETH=m +CONFIG_TYPEC=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y +CONFIG_TYPEC_UCSI=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_CQHCI=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_RS5C372=y +CONFIG_RTC_DRV_STM32=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_PL330_DMA=y +CONFIG_STM32_DMA=y +CONFIG_STM32_DMAMUX=y +CONFIG_STM32_MDMA=y +CONFIG_DW_DMAC=y +CONFIG_SYNC_FILE=y +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=y +CONFIG_VIRTIO_MMIO=y +CONFIG_STAGING=y +CONFIG_STAGING_BOARD=y +CONFIG_MAILBOX=y +CONFIG_PL320_MBOX=y +CONFIG_RPMSG_VIRTIO=m +CONFIG_SOC_BRCMSTB=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m +CONFIG_MEMORY=y +CONFIG_STM32_FMC2_EBI=y +CONFIG_IIO=y +CONFIG_IIO_BUFFER_CB=y +CONFIG_IIO_SW_DEVICE=y +CONFIG_IIO_SW_TRIGGER=y +CONFIG_STM32_ADC_CORE=y +CONFIG_STM32_ADC=y +CONFIG_STM32_DAC=y +CONFIG_MPU3050_I2C=y +CONFIG_IIO_HRTIMER_TRIGGER=y +CONFIG_PWM=y +CONFIG_PHY_STM32_USBPHYC=y +CONFIG_NVMEM_STM32_ROMEM=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FANOTIFY=y +CONFIG_QUOTA=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_QFMT_V2=y +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_SQUASHFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_SERPENT=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC7=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_STACKTRACE=y +# CONFIG_FTRACE is not set +CONFIG_UNWINDER_FRAME_POINTER=y +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y