Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ...
This commit is contained in:
Linus Torvalds
@@ -25,10 +25,6 @@
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#define MCBSP_CONFIG_TYPE2 0x2
|
||||
#define MCBSP_CONFIG_TYPE3 0x3
|
||||
#define MCBSP_CONFIG_TYPE4 0x4
|
||||
|
||||
/* Platform specific configuration */
|
||||
struct omap_mcbsp_ops {
|
||||
void (*request)(unsigned int);
|
||||
@@ -47,14 +43,6 @@ struct omap_mcbsp_platform_data {
|
||||
int (*force_ick_on)(struct clk *clk, bool force_on);
|
||||
};
|
||||
|
||||
/**
|
||||
* omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
|
||||
* @sidetone: name of the sidetone device
|
||||
*/
|
||||
struct omap_mcbsp_dev_attr {
|
||||
const char *sidetone;
|
||||
};
|
||||
|
||||
void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -20,12 +20,50 @@
|
||||
#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__
|
||||
#define __PLATFORM_DATA_DMTIMER_OMAP_H__
|
||||
|
||||
struct omap_dm_timer_ops {
|
||||
struct omap_dm_timer *(*request_by_node)(struct device_node *np);
|
||||
struct omap_dm_timer *(*request_specific)(int timer_id);
|
||||
struct omap_dm_timer *(*request)(void);
|
||||
|
||||
int (*free)(struct omap_dm_timer *timer);
|
||||
|
||||
void (*enable)(struct omap_dm_timer *timer);
|
||||
void (*disable)(struct omap_dm_timer *timer);
|
||||
|
||||
int (*get_irq)(struct omap_dm_timer *timer);
|
||||
int (*set_int_enable)(struct omap_dm_timer *timer,
|
||||
unsigned int value);
|
||||
int (*set_int_disable)(struct omap_dm_timer *timer, u32 mask);
|
||||
|
||||
struct clk *(*get_fclk)(struct omap_dm_timer *timer);
|
||||
|
||||
int (*start)(struct omap_dm_timer *timer);
|
||||
int (*stop)(struct omap_dm_timer *timer);
|
||||
int (*set_source)(struct omap_dm_timer *timer, int source);
|
||||
|
||||
int (*set_load)(struct omap_dm_timer *timer, int autoreload,
|
||||
unsigned int value);
|
||||
int (*set_match)(struct omap_dm_timer *timer, int enable,
|
||||
unsigned int match);
|
||||
int (*set_pwm)(struct omap_dm_timer *timer, int def_on,
|
||||
int toggle, int trigger);
|
||||
int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler);
|
||||
|
||||
unsigned int (*read_counter)(struct omap_dm_timer *timer);
|
||||
int (*write_counter)(struct omap_dm_timer *timer,
|
||||
unsigned int value);
|
||||
unsigned int (*read_status)(struct omap_dm_timer *timer);
|
||||
int (*write_status)(struct omap_dm_timer *timer,
|
||||
unsigned int value);
|
||||
};
|
||||
|
||||
struct dmtimer_platform_data {
|
||||
/* set_timer_src - Only used for OMAP1 devices */
|
||||
int (*set_timer_src)(struct platform_device *pdev, int source);
|
||||
u32 timer_capability;
|
||||
u32 timer_errata;
|
||||
int (*get_context_loss_count)(struct device *);
|
||||
const struct omap_dm_timer_ops *timer_ops;
|
||||
};
|
||||
|
||||
#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */
|
||||
|
||||
@@ -157,11 +157,6 @@
|
||||
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
|
||||
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
|
||||
|
||||
struct omap_gpio_dev_attr {
|
||||
int bank_width; /* GPIO bank width */
|
||||
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
|
||||
};
|
||||
|
||||
struct omap_gpio_reg_offs {
|
||||
u16 revision;
|
||||
u16 direction;
|
||||
|
||||
@@ -6,41 +6,22 @@
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
/*
|
||||
* Current pxa3xx_nand controller has two chip select which
|
||||
* both be workable.
|
||||
*
|
||||
* Notice should be taken that:
|
||||
* When you want to use this feature, you should not enable the
|
||||
* keep configuration feature, for two chip select could be
|
||||
* attached with different nand chip. The different page size
|
||||
* and timing requirement make the keep configuration impossible.
|
||||
* Current pxa3xx_nand controller has two chip select which both be workable but
|
||||
* historically all platforms remaining on platform data used only one. Switch
|
||||
* to device tree if you need more.
|
||||
*/
|
||||
|
||||
/* The max num of chip select current support */
|
||||
#define NUM_CHIP_SELECT (2)
|
||||
struct pxa3xx_nand_platform_data {
|
||||
|
||||
/* the data flash bus is shared between the Static Memory
|
||||
* Controller and the Data Flash Controller, the arbiter
|
||||
* controls the ownership of the bus
|
||||
*/
|
||||
int enable_arbiter;
|
||||
|
||||
/* allow platform code to keep OBM/bootloader defined NFC config */
|
||||
int keep_config;
|
||||
|
||||
/* indicate how many chip selects will be used */
|
||||
int num_cs;
|
||||
|
||||
/* use an flash-based bad block table */
|
||||
bool flash_bbt;
|
||||
|
||||
/* requested ECC strength and ECC step size */
|
||||
/* Keep OBM/bootloader NFC timing configuration */
|
||||
bool keep_config;
|
||||
/* Use a flash-based bad block table */
|
||||
bool flash_bbt;
|
||||
/* Requested ECC strength and ECC step size */
|
||||
int ecc_strength, ecc_step_size;
|
||||
|
||||
const struct mtd_partition *parts[NUM_CHIP_SELECT];
|
||||
unsigned int nr_parts[NUM_CHIP_SELECT];
|
||||
/* Partitions */
|
||||
const struct mtd_partition *parts;
|
||||
unsigned int nr_parts;
|
||||
};
|
||||
|
||||
extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
|
||||
|
||||
#endif /* __ASM_ARCH_PXA3XX_NAND_H */
|
||||
|
||||
@@ -0,0 +1,21 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* phy-da8xx-usb - TI DaVinci DA8xx USB PHY driver
|
||||
*
|
||||
* Copyright (C) 2018 David Lechner <david@lechnology.com>
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
|
||||
#define __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
|
||||
|
||||
#include <linux/regmap.h>
|
||||
|
||||
/**
|
||||
* da8xx_usb_phy_platform_data
|
||||
* @cfgchip: CFGCHIP syscon regmap
|
||||
*/
|
||||
struct da8xx_usb_phy_platform_data {
|
||||
struct regmap *cfgchip;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ */
|
||||
@@ -0,0 +1,42 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* TI pm33xx platform data
|
||||
*
|
||||
* Copyright (C) 2016-2018 Texas Instruments, Inc.
|
||||
* Dave Gerlach <d-gerlach@ti.com>
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_PLATFORM_DATA_PM33XX_H
|
||||
#define _LINUX_PLATFORM_DATA_PM33XX_H
|
||||
|
||||
#include <linux/kbuild.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
struct am33xx_pm_sram_addr {
|
||||
void (*do_wfi)(void);
|
||||
unsigned long *do_wfi_sz;
|
||||
unsigned long *resume_offset;
|
||||
unsigned long *emif_sram_table;
|
||||
unsigned long *ro_sram_data;
|
||||
};
|
||||
|
||||
struct am33xx_pm_platform_data {
|
||||
int (*init)(void);
|
||||
int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long));
|
||||
struct am33xx_pm_sram_addr *(*get_sram_addrs)(void);
|
||||
};
|
||||
|
||||
struct am33xx_pm_sram_data {
|
||||
u32 wfi_flags;
|
||||
u32 l2_aux_ctrl_val;
|
||||
u32 l2_prefetch_ctrl_val;
|
||||
} __packed __aligned(8);
|
||||
|
||||
struct am33xx_pm_ro_sram_data {
|
||||
u32 amx3_pm_sram_data_virt;
|
||||
u32 amx3_pm_sram_data_phys;
|
||||
} __packed __aligned(8);
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
#endif /* _LINUX_PLATFORM_DATA_PM33XX_H */
|
||||
@@ -2,10 +2,6 @@
|
||||
#ifndef _OMAP2_MCSPI_H
|
||||
#define _OMAP2_MCSPI_H
|
||||
|
||||
#define OMAP2_MCSPI_REV 0
|
||||
#define OMAP3_MCSPI_REV 1
|
||||
#define OMAP4_MCSPI_REV 2
|
||||
|
||||
#define OMAP4_MCSPI_REG_OFFSET 0x100
|
||||
|
||||
#define MCSPI_PINDIR_D0_IN_D1_OUT 0
|
||||
@@ -17,10 +13,6 @@ struct omap2_mcspi_platform_config {
|
||||
unsigned int pin_dir:1;
|
||||
};
|
||||
|
||||
struct omap2_mcspi_dev_attr {
|
||||
unsigned short num_chipselect;
|
||||
};
|
||||
|
||||
struct omap2_mcspi_device_config {
|
||||
unsigned turbo_mode:1;
|
||||
|
||||
|
||||
@@ -16,6 +16,10 @@ enum ti_sysc_module_type {
|
||||
TI_SYSC_OMAP4_USB_HOST_FS,
|
||||
};
|
||||
|
||||
struct ti_sysc_cookie {
|
||||
void *data;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
|
||||
* @midle_shift: Offset of the midle bit
|
||||
@@ -41,6 +45,7 @@ struct sysc_regbits {
|
||||
s8 emufree_shift;
|
||||
};
|
||||
|
||||
#define SYSC_QUIRK_LEGACY_IDLE BIT(8)
|
||||
#define SYSC_QUIRK_RESET_STATUS BIT(7)
|
||||
#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6)
|
||||
#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5)
|
||||
@@ -83,4 +88,49 @@ struct sysc_config {
|
||||
u32 quirks;
|
||||
};
|
||||
|
||||
enum sysc_registers {
|
||||
SYSC_REVISION,
|
||||
SYSC_SYSCONFIG,
|
||||
SYSC_SYSSTATUS,
|
||||
SYSC_MAX_REGS,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
|
||||
* @name: legacy "ti,hwmods" module name
|
||||
* @module_pa: physical address of the interconnect target module
|
||||
* @module_size: size of the interconnect target module
|
||||
* @offsets: array of register offsets as listed in enum sysc_registers
|
||||
* @nr_offsets: number of registers
|
||||
* @cap: interconnect target module capabilities
|
||||
* @cfg: interconnect target module configuration
|
||||
*
|
||||
* This data is enough to allocate a new struct omap_hwmod_class_sysconfig
|
||||
* based on device tree data parsed by ti-sysc driver.
|
||||
*/
|
||||
struct ti_sysc_module_data {
|
||||
const char *name;
|
||||
u64 module_pa;
|
||||
u32 module_size;
|
||||
int *offsets;
|
||||
int nr_offsets;
|
||||
const struct sysc_capabilities *cap;
|
||||
struct sysc_config *cfg;
|
||||
};
|
||||
|
||||
struct device;
|
||||
|
||||
struct ti_sysc_platform_data {
|
||||
struct of_dev_auxdata *auxdata;
|
||||
int (*init_module)(struct device *dev,
|
||||
const struct ti_sysc_module_data *data,
|
||||
struct ti_sysc_cookie *cookie);
|
||||
int (*enable_module)(struct device *dev,
|
||||
const struct ti_sysc_cookie *cookie);
|
||||
int (*idle_module)(struct device *dev,
|
||||
const struct ti_sysc_cookie *cookie);
|
||||
int (*shutdown_module)(struct device *dev,
|
||||
const struct ti_sysc_cookie *cookie);
|
||||
};
|
||||
|
||||
#endif /* __TI_SYSC_DATA_H__ */
|
||||
|
||||
Reference in New Issue
Block a user