clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI
Drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL.MIPI. These are now
defined in dt-bindings/clock/sun50i-a64-ccu.h
Fixes: ca1170b699 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Frank Oltmanns <frank@oltmanns.dev> # on pinephone
Tested-by: Stuart Gathman <stuart@gathman.org> # on OG pinebook
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Link: https://patch.msgid.link/20250104074035.1611136-3-anarsoul@gmail.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
committed by
Chen-Yu Tsai
parent
9897831de6
commit
0f368cb7ef
@@ -21,7 +21,6 @@
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/* PLL_VIDEO0 exported for HDMI PHY */
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/* PLL_VIDEO0 exported for HDMI PHY */
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#define CLK_PLL_VIDEO0_2X 8
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#define CLK_PLL_VE 9
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#define CLK_PLL_VE 9
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#define CLK_PLL_DDR0 10
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#define CLK_PLL_DDR0 10
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@@ -32,7 +31,6 @@
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#define CLK_PLL_PERIPH1_2X 14
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#define CLK_PLL_PERIPH1_2X 14
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#define CLK_PLL_VIDEO1 15
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#define CLK_PLL_VIDEO1 15
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#define CLK_PLL_GPU 16
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#define CLK_PLL_GPU 16
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#define CLK_PLL_MIPI 17
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#define CLK_PLL_HSIC 18
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#define CLK_PLL_HSIC 18
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#define CLK_PLL_DE 19
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#define CLK_PLL_DE 19
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#define CLK_PLL_DDR1 20
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#define CLK_PLL_DDR1 20
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